Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / c00a3695b431032b4b9be4e3f7e6ada3c2bcb70a / drivers / ddr / marvell / a38x / ddr3_training.c
  1. 5450f0c ddr: marvell: update ddr controller init and freq by Chris Packham · Thu Jan 18 17:16:10 2018 +1300
  2. 1324fab ddr: marvell: use correct TREFI value by Chris Packham · Thu Jan 18 17:16:08 2018 +1300
  3. ae80614 ddr: marvell: only assert M_ODT[0] on write for a single CS by Chris Packham · Thu Jan 18 17:16:07 2018 +1300
  4. f8bf75f driver/ddr: Add support for setting timing in hws_topology_map by Marek Behún · Fri Jun 09 19:28:40 2017 +0200
  5. c5b1e5d Various, accumulated typos collected from around the tree. by Robert P. J. Day · Wed Sep 07 14:27:59 2016 -0400
  6. 5ffceb8 arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr by Stefan Roese · Thu Mar 26 15:36:56 2015 +0100