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filogic
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uboot
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beb7a0fc568f9c30807428cdd4be0e19b3da2cbf
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drivers
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ddr
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marvell
622b7b3
treewide: remove unneeded semicolons
by Masahiro Yamada
· Tue Jun 13 15:17:28 2017 +0900
c5b1e5d
Various, accumulated typos collected from around the tree.
by Robert P. J. Day
· Wed Sep 07 14:27:59 2016 -0400
30fe357
drivers: squash lines for immediate return
by Masahiro Yamada
· Tue Sep 06 22:17:39 2016 +0900
31fdba2
arm: mvebu: a38x: Weed out floating point use
by Marek Vasut
· Sat Apr 30 14:45:42 2016 +0200
edfdb99
Fix spelling of "occurred".
by Vagrant Cascadian
· Sat Apr 30 19:18:00 2016 -0700
5b2c16a
arm: mvebu: Fix ddr3_init() cpu config
by Dirk Eibach
· Wed Oct 28 16:44:15 2015 +0100
7557405
Use correct spelling of "U-Boot"
by Bin Meng
· Fri Feb 05 19:30:11 2016 -0800
d911168
mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BIT
by Phil Sutter
· Fri Dec 25 14:41:23 2015 +0100
33aa8de
axp: Fix debugging support in DDR3 write leveling
by Phil Sutter
· Fri Dec 25 14:41:19 2015 +0100
ff7ad17
arm: mvebu: Make ECC support configurable on Armada XP
by Stefan Roese
· Thu Dec 10 15:02:38 2015 +0100
3c6b6fc
arm: mvebu: ddr: Fix compilation warning
by Stefan Roese
· Thu Nov 19 13:50:10 2015 +0100
dea4e33
arm: mvebu: Fix SAR1_CPU_CORE_MASK
by Dirk Eibach
· Wed Oct 28 16:44:14 2015 +0100
0277a6b
arm: mvebu: a38x: Remove unsupported topologies
by Kevin Smith
· Fri Oct 23 17:53:19 2015 +0000
69bab55
bitops: introduce BIT() definition
by Heiko Schocher
· Mon Sep 07 13:43:52 2015 +0200
f3345e6
arm: mvebu: Add complete SDRAM ECC scrubbing
by Stefan Roese
· Thu Aug 06 14:43:13 2015 +0200
e4a0f27
arm: mvebu: sdram: Enable ECC support on Armada XP
by Stefan Roese
· Tue Aug 11 17:08:01 2015 +0200
61cee0a
arm: mvebu: a38x: Use correct PEX register access macros
by Stefan Roese
· Mon Jun 08 17:01:26 2015 +0200
5ffceb8
arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr
by Stefan Roese
· Thu Mar 26 15:36:56 2015 +0100
eb753e9
arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directory
by Stefan Roese
· Wed Mar 25 12:51:18 2015 +0100