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git01.mediatek.com / filogic / uboot / bd13eabb44a6123bceb9715ec8f1cef4f42a69af / arch / powerpc / include / asm / ppc4xx-sdram.h
  1. bd8ec7e Coding Style cleanup: remove trailing white space by Wolfgang Denk · Mon Oct 07 13:07:26 2013 +0200
  2. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  3. a1b457a include/linux/byteorder: import latest endian definitions from linux by Kim Phillips · Mon Oct 29 13:34:23 2012 +0000
  4. 95ac428 APM821xx: Add CPU support by Tirumala Marri · Tue Sep 28 14:15:14 2010 -0700
  5. 95ca5fa ppc4xx: Big header cleanup, mostly PPC440 related by Stefan Roese · Sat Sep 11 09:31:43 2010 +0200
  6. 971edca ppc4xx: DDR/ECC: Use correct macros to clear error status by Stefan Roese · Wed Jul 21 11:08:27 2010 +0200
  7. ef04420 ppc4xx: Only define DDR2 registers for the correct PowerPC variants by Stefan Roese · Wed Jul 21 11:08:16 2010 +0200
  8. e0b2445 ppc4xx: Add DDR1/2 macros in ppc4xx-sdram.h for non-405EX as well by Stefan Roese · Tue May 25 16:13:41 2010 +0200
  9. 756eff8 ppc4xx: Enable overwriting of default scan window for IBM DDR2 controller by Stefan Roese · Tue May 25 15:23:07 2010 +0200
  10. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · Thu Apr 15 16:07:28 2010 +0200[Renamed from arch/ppc/include/asm/ppc4xx-sdram.h]
  11. 3cba3c1 Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · Mon Apr 12 22:28:08 2010 -0500[Renamed from include/asm-ppc/ppc4xx-sdram.h]
  12. cb9ebd0 ppc4xx: Merge PPC4xx DDR and DDR2 ECC handling by Stefan Roese · Mon Sep 28 17:33:45 2009 +0200
  13. 6987e65 ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper case by Stefan Roese · Thu Sep 24 13:59:57 2009 +0200
  14. f1a2ed8 ppc4xx: Autocalibration can set RDCC to over aggressive value. by Adam Graham · Mon Feb 09 13:18:12 2009 -0800
  15. bbfab70 ppc4xx: PPC44x MQ initialization by Yuri Tikhonov · Fri Oct 17 12:54:18 2008 +0200
  16. a7c7d86 Revert "ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz (200MHz PLB)" by Stefan Roese · Mon Sep 22 11:06:50 2008 +0200
  17. 97d6a34 ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz (200MHz PLB) by Victor Gallardo · Tue Sep 16 06:59:13 2008 -0700
  18. 9c31901 ppc4xx: Move ppc4xx specific prototypes to ppc4xx header by Stefan Roese · Mon Sep 08 14:11:12 2008 +0200
  19. 97a5581 ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routines by Adam Graham · Wed Sep 03 12:26:59 2008 -0700
  20. 038f0d8 ppc4xx: Optimize PLB4 Arbiter and Memory Queue settings for PPC440SP/SPe, by Prodyut Hazarika · Wed Aug 20 09:38:51 2008 -0700
  21. 9416cd9 ppc4xx: Add Mnemonics for AMCC/IBM DDR2 SDRAM Controller by Grant Erickson · Wed Jul 09 16:46:35 2008 -0700
  22. b990b81 ppc4xx: Add AMCC/IBM DDR2 SDRAM ECC Field Mnemonics by Grant Erickson · Wed Jul 09 16:31:59 2008 -0700
  23. cf64edd PPC4xx: Correct SDRAM_MCSTAT for PPC405EX(r) by Grant Erickson · Wed Jul 09 11:55:46 2008 -0700
  24. 33384d1 ppc4xx: Add initial 460SX reference board (redwood) config file and defines. by Feng Kan · Tue Jul 08 22:48:07 2008 -0700
  25. 0203a97 ppc4xx: Enable support for > 2GB SDRAM on AMCC Katmai by Stefan Roese · Wed Jul 09 17:33:57 2008 +0200
  26. dee8890 ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part2 by Stefan Roese · Mon Jun 02 14:59:21 2008 +0200