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git01.mediatek.com / filogic / uboot / ba93f4efc95ee43e5e3cc015dac684bb115dbefb / include / fsl_ddr_dimm_params.h
  1. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · Mon Sep 30 09:22:09 2013 -0700[Renamed from arch/powerpc/include/asm/fsl_ddr_dimm_params.h]
  2. 0b81093 mpc8xxx: set x2 DDR3 refresh rate if SPD config requires it by Valentin Longchamp · Fri Oct 18 11:47:20 2013 +0200
  3. 4a71741 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · Wed Sep 25 10:41:19 2013 +0530
  4. 4889c98 powerpc/mpc8xxx: Add x4 DDR device support by York Sun · Tue Jun 25 11:37:47 2013 -0700
  5. 794c692 powerpc/mpc8xxx: Add fine timing support for DDR3 by York Sun · Fri Aug 17 08:22:37 2012 +0000
  6. fbe6595 powerpc/mpc8xxx: fix recognition of DIMMs with ECC and Address Parity by York Sun · Thu Mar 17 11:18:10 2011 -0700
  7. de87932 powerpc/8xxx: Enable DDR3 RDIMM support by york · Fri Jul 02 22:25:55 2010 +0000
  8. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · Thu Apr 15 16:07:28 2010 +0200[Renamed from arch/ppc/include/asm/fsl_ddr_dimm_params.h]
  9. 3cba3c1 Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · Mon Apr 12 22:28:08 2010 -0500[Renamed from include/asm-ppc/fsl_ddr_dimm_params.h]
  10. 4be87b2 fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · Sat Mar 14 12:48:30 2009 +0800
  11. fa44036 Pass dimm parameters to populate populate controller options by Haiying Wang · Fri Oct 03 12:36:55 2008 -0400[Renamed from cpu/mpc8xxx/ddr/ddr1_2_dimm_params.h]
  12. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · Tue Aug 26 15:01:29 2008 -0500