Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / b8fb7b8317834af494902912bbd463209ff121c4 / drivers / net / designware.h
  1. 498fb83 net/designware: align DMA buffer descriptors to D$ line by Alexey Brodkin · Fri Mar 21 16:16:57 2014 +0400
  2. 9a0b130 net/designware - switch driver to phylib usage by Alexey Brodkin · Wed Jan 22 20:54:06 2014 +0400
  3. 7d4a25d net: designware: Fix alignment of buffer descriptors by Alexey Brodkin · Wed Sep 25 19:27:48 2013 +0400
  4. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  5. d27e86c net: Multiple updates/enhancements to designware.c by Stefan Roese · Mon May 07 12:04:25 2012 +0200
  6. 7443d60 SPEAr: Add interface information in initialization by Vipin Kumar · Mon May 07 13:06:44 2012 +0530
  7. b6c5999 net/designware: Try configuring phy on each dw_eth_init by Vipin Kumar · Mon Mar 26 00:09:56 2012 +0000
  8. 53d4cbf net/designware: Fix the max frame length size by Vipin KUMAR · Mon Mar 26 00:09:53 2012 +0000
  9. 1f87312 SPEAr : Network driver support added by Vipin KUMAR · Tue Jun 29 10:53:34 2010 +0530