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git01.mediatek.com / filogic / uboot / b8666dd4c3a322a340f1457b4f4c2bab5a36a2b8 / arch / arm / dts / socfpga_cyclone5_vining_fpga.dts
  1. a1c1ec1 ARM: socfpga: vining_fpga: Update DT by Marek Vasut · Thu Jun 27 00:19:32 2019 +0200
  2. 13da18c ARM: socfpga: vining_fpga: Rename VINING|FPGA by Marek Vasut · Thu Jun 27 00:19:31 2019 +0200
  3. 457107f net: phy: micrel: Use correct skew values on KSZ9021 by James Byrne · Mon Mar 04 17:40:33 2019 +0000
  4. 15616b5 dts: arm: socfpga: merge gen5 devicetrees from linux by Simon Goldschmidt · Fri Nov 02 11:54:52 2018 +0100
  5. 3854a1a arm: socfpga: fix device trees to work with DM serial by Simon Goldschmidt · Mon Aug 13 21:34:33 2018 +0200
  6. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  7. feaa3f9 dts: cadence_spi: Sync DT bindings with Linux by Jason Rush · Tue Jan 23 17:13:10 2018 -0600
  8. ba2ade9 arm: socfpga: Add samtec VIN|ING board by Marek Vasut · Tue Dec 01 18:09:52 2015 +0100