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git01.mediatek.com / filogic / uboot / b7f85896470c2113c43565abf3d1c938532c4558 / drivers / clk / clk-divider.c
  1. 39fc7a6 clk: export generic routines by Dario Binacchi · Wed Dec 30 00:06:27 2020 +0100
  2. 1a62dc1 clk: set flags in the ccf registration routines by Dario Binacchi · Mon Apr 13 14:36:27 2020 +0200
  3. cfc2f02 clk: Always use the supplied struct clk by Sean Anderson · Wed Jun 24 06:41:06 2020 -0400
  4. c06c1be common: Drop linux/bug.h from common header by Simon Glass · Sun May 10 11:40:08 2020 -0600
  5. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  6. fd67c63 clk: divider set rate supporrt by Peng Fan · Wed Jul 31 07:01:37 2019 +0000
  7. 5106fbb clk: use clk_dev_binded by Peng Fan · Wed Jul 31 07:01:26 2019 +0000
  8. bb18f1b clk: sandbox: Adjust clk-divider to emulate reading its value from HW by Lukasz Majewski · Mon Jun 24 15:50:48 2019 +0200
  9. 4de44bb clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12) by Lukasz Majewski · Mon Jun 24 15:50:45 2019 +0200