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filogic
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uboot
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b74a201582256de9ac7f5b99b8a3021ca33a0af5
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board
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xilinx
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zynq
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zynq-microzed
accb63b
WS cleanup: remove excessive empty lines
by Wolfgang Denk
· Mon Sep 27 17:42:37 2021 +0200
3fd6633
WS cleanup: remove trailing empty lines
by Wolfgang Denk
· Mon Sep 27 17:42:36 2021 +0200
79c1f6d
arm: zynq: Remove low level UART setting
by Michal Simek
· Fri Dec 06 09:33:25 2019 +0100
70df9d6
SPDX: Convert a few files that were missed before
by Tom Rini
· Mon May 07 17:02:21 2018 -0400
322b57b
arm: zynq: Convert all board to use arch ps7_init code
by Michal Simek
· Fri Nov 10 11:00:42 2017 +0100
3924efd
arm: zynq: Remove ps7_debug code
by Michal Simek
· Fri Nov 10 09:09:48 2017 +0100
3917c4f
ARM: zynq: Simplify zynq configuration
by Michal Simek
· Fri May 20 14:59:33 2016 +0200