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git01.mediatek.com / filogic / uboot / b717bd863f01f8d47d242f70b11406341388001c / arch / arm / include / asm / arch-sunxi / dram.h
  1. b1ace77 sunxi: dram: Configurable DQS gating window mode and delay by Siarhei Siamashka · Sun Aug 03 05:32:51 2014 +0300
  2. c4f0aa5 sunxi: dram: Add a helper function 'mctl_get_number_of_lanes' by Siarhei Siamashka · Sun Aug 03 05:32:50 2014 +0300
  3. 8e9c4fd sunxi: dram: Improve DQS gate data training error handling by Siarhei Siamashka · Sun Aug 03 05:32:49 2014 +0300
  4. 586757a sunxi: dram: Configurable MBUS clock speed (use PLL5 or PLL6) by Siarhei Siamashka · Sun Aug 03 05:32:47 2014 +0300
  5. 3ad063a sunxi: dram: Re-introduce the impedance calibration ond ODT by Siarhei Siamashka · Sun Aug 03 05:32:46 2014 +0300
  6. 2f1afcc sunxi: add sun7i dram setup support by Ian Campbell · Mon May 05 11:52:25 2014 +0100