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git01.mediatek.com / filogic / uboot / b31868fffeafc0a2fb898d5cc4cc1a0d673b5fec / drivers / ddr / fsl / mpc85xx_ddr_gen1.c
  1. a21803d Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx by York Sun · 11 years ago
  2. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago[Renamed (92%) from arch/powerpc/cpu/mpc85xx/ddr-gen1.c]
  3. 5e15555 powerpc/mpc8xxx: Add memory reset control by York Sun · 11 years ago
  4. 992562c 8xxx: Change all 8*xx_DDR addresses to 8xxx by Andy Fleming · 12 years ago
  5. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc85xx/ddr-gen1.c]
  6. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc85xx/ddr-gen1.c]
  7. 4e928b5 fsl_dma: Break out common memory initialization function by Peter Tyser · 15 years ago
  8. a9af1dc 8xxx: Move dma_init() call to common code by Peter Tyser · 15 years ago
  9. 4e5649f fsl_dma: Move dma function prototypes to common header file by Peter Tyser · 15 years ago
  10. 86ff89b 8xxx: Rename dma_xfer() to dmacpy() by Peter Tyser · 15 years ago
  11. 0383694 rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago
  12. d5a1fb9 FSL DDR: Add 85xx specific register setting by Kumar Gala · 16 years ago