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git01.mediatek.com / filogic / uboot / b0d9163a1b390eee27369f3d8cbc3857fbd4ab90 / arch / arm / include / asm / arch-exynos / clock.h
  1. 8625f10 EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12 by Chander Kashyap · Tue Dec 25 20:13:40 2012 +0000
  2. 392a73a EXYNOS: Add clock for I2S by Rajeshwari Shinde · Thu Oct 25 19:49:29 2012 +0000
  3. 8411286 EXYNOS5: CLOCK: Add BPLL support by Rajeshwari Shinde · Tue Jul 03 20:02:58 2012 +0000
  4. 7b9afce EXYNOS5: CLOCK: Modify MPLL clock out for Exynos5250 Rev 1.0 by Rajeshwari Shinde · Tue Jul 03 20:02:57 2012 +0000
  5. c823267 EXYNOS5: CLOCK: define additional clock registers for Exynos5250 Rev 1.0 by Rajeshwari Shinde · Tue Jul 03 20:02:54 2012 +0000
  6. 34076a0 ARM: EXYNOS: Add support for Exynos5 based SoCs by Chander Kashyap · Sun Feb 05 23:01:46 2012 +0000
  7. 4131a77 S5PC2XX: Rename S5pc2XX to exynos by Chander Kashyap · Tue Dec 06 23:34:12 2011 +0000[Renamed (99%) from arch/arm/include/asm/arch-s5pc2xx/clock.h]
  8. b1b2468 armv7: add support for S5PC210 SoC by Minkyu Kang · Mon Jan 24 15:22:23 2011 +0900