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git01.mediatek.com / filogic / uboot / afc51ad1b5de2fdd0277c1dff71297c00e7cd5b4 / cpu / mpc85xx / tlb.c
  1. afc51ad ppc/85xx: Move code around to prep for NAND_SPL by Kumar Gala · Fri Sep 11 12:32:01 2009 -0500
  2. f82885e ppc/85xx: Repack tlb_table to save space by Kumar Gala · Fri Sep 11 11:30:30 2009 -0500
  3. c417c91 ppc/85xx: Introduce low level write_tlb function by Kumar Gala · Fri Sep 11 11:27:00 2009 -0500
  4. 31e6010 ppc/85xx: Ensure that MAS8 is zero when writing TLB entries. by Scott Wood · Thu Aug 20 17:45:05 2009 -0500
  5. d13eb3c ppc/85xx: Add a simple function to search the TLB by Kumar Gala · Thu Sep 03 08:20:24 2009 -0500
  6. 6b9b996 Prepare 2009.08-rc3 by Wolfgang Denk · Sat Aug 22 23:27:26 2009 +0200
  7. 87f5792 85xx: Fix addrmap to include memory by Kumar Gala · Fri Aug 14 16:43:22 2009 -0500
  8. d10d3b1 85xx: Use print_size to report amount of memory not mapped by TLBs by Kumar Gala · Thu Jun 11 23:40:34 2009 -0500
  9. 20db47d 85xx: bugfix for reading maximum TLB size on mpc85xx by Fredrik Arnerup · Tue Jun 02 16:27:10 2009 -0500
  10. 6630ffb 85xx: Fix how we map DDR memory by Kumar Gala · Fri Feb 06 09:56:35 2009 -0600
  11. 8a353d5 Change DDR tlb start entry to CONFIG param for 85xx by Haiying Wang · Tue Jan 13 16:29:22 2009 -0500
  12. 9ac287a 85xx: Add support to populate addr map based on TLB settings by Kumar Gala · Tue Dec 16 14:59:20 2008 -0600
  13. 0383694 rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · Thu Oct 16 15:01:15 2008 +0200
  14. 80f4bc7 FSL DDR: Add e500 TLB helper for DDR code by Kumar Gala · Mon Jun 09 11:07:46 2008 -0500
  15. 3595e61 Coding Style Cleanup; update CHANGELOG by Wolfgang Denk · Wed Jan 23 14:31:17 2008 +0100
  16. d7ea3e3 85xx: Get ride of old TLB setup code by Kumar Gala · Thu Jan 17 02:19:18 2008 -0600
  17. 95bb67f 85xx: Introduce new tlb API by Kumar Gala · Wed Jan 16 22:33:22 2008 -0600