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git01.mediatek.com / filogic / uboot / ae48d205aa9731b2a028b80ff29c58c56dbcf023 / drivers / ddr / fsl / mpc85xx_ddr_gen2.c
  1. a21803d Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx by York Sun · Mon Nov 18 10:29:32 2013 -0800
  2. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · Mon Sep 30 09:22:09 2013 -0700[Renamed (96%) from arch/powerpc/cpu/mpc85xx/ddr-gen2.c]
  3. 5e15555 powerpc/mpc8xxx: Add memory reset control by York Sun · Tue Jun 25 11:37:48 2013 -0700
  4. 992562c 8xxx: Change all 8*xx_DDR addresses to 8xxx by Andy Fleming · Tue Oct 23 19:03:46 2012 -0500
  5. 866c6fa powerpc/mpc8548: Add workaround for erratum NMG_DDR120 by Kumar Gala · Fri Sep 16 09:54:30 2011 -0500
  6. e12ce98 powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver by York Sun · Fri Aug 26 11:32:44 2011 -0700
  7. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · Thu Apr 15 16:07:28 2010 +0200[Renamed from arch/ppc/cpu/mpc85xx/ddr-gen2.c]
  8. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · Mon Apr 12 22:28:09 2010 -0500[Renamed from cpu/mpc85xx/ddr-gen2.c]
  9. 0383694 rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · Thu Oct 16 15:01:15 2008 +0200
  10. d5a1fb9 FSL DDR: Add 85xx specific register setting by Kumar Gala · Tue Aug 26 21:34:55 2008 -0500