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git01.mediatek.com / filogic / uboot / adda11160346c765b10c71c9d71e465a4185ff50 / include / dt-bindings / clock / mt7988-clk.h
  1. e4bfc44 clk: mediatek: mt7988: rename CK to CLK by Christian Marangi · Sat Aug 03 10:33:02 2024 +0200
  2. 54894b3 clk: mediatek: mt7988: replace clock ID with upstream linux by Christian Marangi · Sat Aug 03 10:33:00 2024 +0200
  3. dee002c clk: mediatek: mt7988: comment out infracfg clk not defined by Christian Marangi · Sat Aug 03 10:32:59 2024 +0200
  4. 245c850 clk: mediatek: mt7988: drop 1/1 spurious factor for topckgen by Christian Marangi · Sat Aug 03 10:32:58 2024 +0200
  5. ecf47ee clk: mediatek: mt7988: reorder TOPCKGEN factor ID by Christian Marangi · Sat Aug 03 10:32:57 2024 +0200
  6. 532f979 clk: mediatek: mt7988: rename TOPCKGEN factor clock to upstream naming by Christian Marangi · Sat Aug 03 10:32:56 2024 +0200
  7. d1f073e clk: mediatek: mt7988: drop 1/1 infracfg spurious factor by Christian Marangi · Sat Aug 03 10:32:55 2024 +0200
  8. 82a4ce2 clk: mediatek: mt7988: move INFRA_PCIE_PERI_26M_CK_Px clock at top by Christian Marangi · Sat Aug 03 10:32:53 2024 +0200
  9. fb43efd clk: mediatek: mt7988: rename TOP_CK_NPU_SEL_CM_TOPS_SEL to TOP_NPU_SEL by Christian Marangi · Sat Aug 03 10:32:52 2024 +0200
  10. 6db498a clk: mediatek: mt7988: rename TOP_DA_SELM_XTAL_SEL to TOP_DA_SEL by Christian Marangi · Sat Aug 03 10:32:51 2024 +0200
  11. 2861be6 clk: mediatek: mt7988: rename CB_CKSQ_40M to TOP_XTAL by Christian Marangi · Sat Aug 03 10:32:50 2024 +0200
  12. d27e302 clk: mediatek: add clock driver support for MediaTek MT7988 SoC by developer · Wed Jul 19 17:16:28 2023 +0800