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git01.mediatek.com / filogic / uboot / add61f21b2bd001ccaf1fdf61fbfc487fb024eb7 / arch / arm / dts / socfpga_cyclone5_sr1500.dts
  1. 64a12bf arm: socfpga: gen5: add reset & sdr node to SPL devicetrees by Simon Goldschmidt · 6 years ago
  2. a009fa7 dts: switch spi-flash to jedec, spi-nor compatible by Neil Armstrong · 6 years ago
  3. 15616b5 dts: arm: socfpga: merge gen5 devicetrees from linux by Simon Goldschmidt · 6 years ago
  4. 3854a1a arm: socfpga: fix device trees to work with DM serial by Simon Goldschmidt · 6 years ago
  5. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  6. feaa3f9 dts: cadence_spi: Sync DT bindings with Linux by Jason Rush · 7 years ago
  7. 72887e3 arm: socfpga: Fix typos in DT files (environmnet -> environment) by Stefan Roese · 9 years ago
  8. 85e8439 arm: socfpga: sr1500: Misc updates (SPI speed, env location) by Stefan Roese · 9 years ago
  9. bf5ed2e arm: socfpga: Add SoCFPGA SR1500 board by Stefan Roese · 9 years ago