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git01.mediatek.com / filogic / uboot / aa53b98eb88e48df3119b83d544f93a30488a832 / drivers / spi / zynq_spi.c
  1. 8eb23ec spi: zynq_spi: Add cadence compatible string by Michal Simek · 9 years ago
  2. e1af6ae spi: zynq_[q]spi: Use GENMASK macro by Jagan Teki · 9 years ago
  3. f94b3f7 spi: zynq_[q]spi: Use BIT macro by Jagan Teki · 9 years ago
  4. 697cdaa spi: zynq_spi: Remove unneeded headers by Jagan Teki · 9 years ago
  5. 12c941e spi: zynq_spi: Store cs value into private data by Jagan Teki · 9 years ago
  6. 08dd095 spi: zynq_spi: Rename baudrate divisor mask name by Jagan Teki · 9 years ago
  7. be47fc3 spi: zynq_spi: Add config reg shift named macros by Jagan Teki · 9 years ago
  8. a61e216 spi: zynq_spi: Fix to configure CPOL, CPHA mask by Jagan Teki · 9 years ago
  9. 0971778 dm: Use dev_get_addr() where possible by Simon Glass · 9 years ago
  10. 2e0ddea spi: zynq_spi: Simplify debug macro by Michal Simek · 9 years ago
  11. 0cf97aa spi: Fix zynq SPI binding by Michal Simek · 9 years ago
  12. 8208163 spi: zynq_spi: Add fdt support in driver by Jagan Teki · 9 years ago
  13. f212576 dm: spi: zynq_spi: Convert to driver model by Jagan Teki · 9 years ago
  14. 778079a zynq: spi: Remove unnecessary error condition by Siva Durga Prasad Paladugu · 10 years ago
  15. 216ec09 spi: Add zynq spi controller driver by Jagannadha Sutradharudu Teki · 11 years ago