Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / aa0caa227b999f8278a3bdb62df036a585f0d11b / include / configs / socfpga_cyclone5.h
  1. ce340e9 socfpga: initialize designware ethernet by Pavel Machek · Mon Jul 14 14:14:17 2014 +0200
  2. 112cb0d socfpga: Fix SOCFPGA build error for Altera dev kit by Chin Liang See · Tue Jul 22 04:28:35 2014 -0500
  3. 57a5e29 include: remove CONFIG_SPL/CONFIG_TPL definition in config headers by Masahiro Yamada · Wed Jul 30 14:08:25 2014 +0900
  4. b9a72ca include: define CONFIG_SPL and CONFIG_TPL as 1 by Masahiro Yamada · Wed Jul 30 14:08:16 2014 +0900
  5. 3f8ee65 socfpga: timer actually counts down by Pavel Machek · Sun Jul 13 13:10:45 2014 +0200
  6. 6355024 socfpga: Adding Scan Manager driver by Chin Liang See · Tue Jun 10 01:17:42 2014 -0500
  7. 561c9d4 socfpga: Adding DesignWare watchdog support by Chin Liang See · Tue Jun 10 01:11:04 2014 -0500
  8. cb35060 socfpga: Adding Clock Manager driver by Chin Liang See · Tue Mar 04 22:13:53 2014 -0600
  9. 9d92da9 configs: clean up unused macro CONFIG_L2_OFF by Masahiro Yamada · Mon Nov 11 09:49:36 2013 +0900
  10. 55d2326 ARM: socfpga: convert to common timer code by Rob Herring · Fri Oct 04 10:22:46 2013 -0500
  11. 33d1b9a config: remove platform CONFIG_SYS_HZ definition part 2/2 by Rob Herring · Fri Oct 04 08:40:05 2013 -0500
  12. 70fa4e7 socfpga: Adding System Manager driver by Chin Liang See · Wed Sep 11 11:24:48 2013 -0500
  13. 9cd1204 socfpga: Adding configuration for development kit by Chin Liang See · Wed Aug 07 10:06:56 2013 -0500
  14. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  15. facdae5 arm: move C runtime setup code in crt0.S by Albert ARIBAUD · Tue Jan 08 10:18:02 2013 +0000
  16. 0b3176c COMMON: Use __stringify() instead of MK_STR() by Marek Vasut · Sun Sep 23 17:41:24 2012 +0200
  17. ad51f7c ARM: Add Altera SOCFPGA Cyclone5 by Dinh Nguyen · Thu Oct 04 06:46:02 2012 +0000