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git01.mediatek.com / filogic / uboot / a9a4426ec9f503bde65b6ed974d7c4fb51293358 / arch / x86 / cpu / ivybridge
  1. a9a4426 x86: Add multi-processor init by Simon Glass · 10 years ago
  2. 1375e9a x86: ivybridge: Use reset_cpu() by Simon Glass · 10 years ago
  3. 06e694f x86: chromebook_link: dts: Add PCH and LPC devices by Simon Glass · 10 years ago
  4. 404bc5e dm: x86: Add a uclass for a Platform Controller Hub by Simon Glass · 10 years ago
  5. 35f15f6 dm: x86: spi: Convert ICH SPI driver to driver model by Simon Glass · 10 years ago
  6. e0e7b36 dm: x86: pci: Convert chromebook_link to use driver model for pci by Simon Glass · 10 years ago
  7. 7567f46 x86: Split up arch_cpu_init() by Simon Glass · 10 years ago
  8. 240d06d x86: Add a x86_ prefix to the x86-specific PCI functions by Simon Glass · 10 years ago
  9. 684818d x86: video: Allow video ROM execution to fall back to the other method by Simon Glass · 10 years ago
  10. 461cebf x86: Rename MMCONF_BASE_ADDRESS and make it common across x86 by Simon Glass · 10 years ago
  11. e860ee4 x86: ivybridge: Drop the Kconfig MRC cache information by Simon Glass · 10 years ago
  12. 428dfa4 x86: Implement a cache for Memory Reference Code parameters by Simon Glass · 10 years ago
  13. 9281eb5 x86: ivybridge: Update microcode early in boot by Simon Glass · 10 years ago
  14. e591101 x86: ivybridge: Add a way to turn off the CAR by Simon Glass · 10 years ago
  15. a754b95 x86: ivybridge: Request MTRRs for DRAM regions by Simon Glass · 10 years ago
  16. 5a530b6 x86: ivybridge: Set up an MTRR for the video frame buffer by Simon Glass · 10 years ago
  17. 7bf5b9e x86: Add support for MTRRs by Simon Glass · 10 years ago
  18. 666534f x86: ivybridge: Drop support for ROM caching by Simon Glass · 10 years ago
  19. 19ec76d x86: ivybridge: Only run the Video BIOS when video is enabled by Simon Glass · 10 years ago
  20. 293f497 x86: Use consistent name XXX_ADDR for binary blob flash address by Bin Meng · 10 years ago
  21. c8a5c41 x86: Correct problems in the microcode loading by Simon Glass · 10 years ago
  22. 44679e7 x86: ivybridge: Update the microcode by Simon Glass · 10 years ago
  23. 642d248 x86: Add post failure codes for bist and car by Bin Meng · 10 years ago
  24. d90f8e1 x86: Add initial video device init for Intel GMA by Simon Glass · 10 years ago
  25. 61612ed x86: ivybridge: Add northbridge init functions by Simon Glass · 10 years ago
  26. cf46d37 x86: Add init for model 206AX CPU by Simon Glass · 10 years ago
  27. 79248a1 x86: ivybridge: Set up XHCI USB by Simon Glass · 10 years ago
  28. 194d757 x86: ivybridge: Set up EHCI USB by Simon Glass · 10 years ago
  29. cd0adb3 x86: ivybridge: Add SATA init by Simon Glass · 10 years ago
  30. 06409c9 x86: ivybridge: Add additional LPC init by Simon Glass · 10 years ago
  31. f307708 x86: ivybridge: Add PCH init by Simon Glass · 10 years ago
  32. 17f1c40 x86: ivybridge: Add support for BD82x6x PCH by Simon Glass · 10 years ago
  33. 268eefd x86: ivybridge: Implement SDRAM init by Simon Glass · 10 years ago
  34. d22f5c9 x86: ivybridge: Add LAPIC support by Simon Glass · 10 years ago
  35. 30580fc x86: ivybridge: Add early init for PCH devices by Simon Glass · 10 years ago
  36. f79d538 x86: ivybridge: Perform Intel microcode update on boot by Simon Glass · 10 years ago
  37. 367077a x86: ivybridge: Check BIST value on boot by Simon Glass · 10 years ago
  38. f226c41 x86: ivybridge: Perform initial CPU setup by Simon Glass · 10 years ago
  39. dcfac35 x86: ivybridge: Add early LPC init so that serial works by Simon Glass · 10 years ago
  40. 3274ae0 x86: ivybridge: Enable PCI in early init by Simon Glass · 10 years ago
  41. 98f139b x86: chromebook_link: Implement CAR support (cache as RAM) by Simon Glass · 10 years ago
  42. 0b36ecd x86: Add chromebook_link board by Simon Glass · 10 years ago