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git01.mediatek.com / filogic / uboot / a981f685dc967a11eb1b420f5500fd2b114d615a / arch / riscv / include / asm
  1. 89681a7 riscv: Save boot hart id to the global data by Bin Meng · Wed Dec 12 06:12:45 2018 -0800
  2. 9e9e6fe riscv: Add indirect stringification to csr_xxx ops by Bin Meng · Wed Dec 12 06:12:39 2018 -0800
  3. 731e2d4 riscv: Add exception codes for xcause register by Bin Meng · Wed Dec 12 06:12:37 2018 -0800
  4. ea5086b riscv: Add CSR numbers by Bin Meng · Wed Dec 12 06:12:36 2018 -0800
  5. b6ee5e1 riscv: Add a SYSCON driver for SiFive's Core Local Interruptor by Bin Meng · Wed Dec 12 06:12:30 2018 -0800
  6. 89b3934 riscv: Add kconfig option to run U-Boot in S-mode by Anup Patel · Mon Dec 03 10:57:40 2018 +0530
  7. 842d580 riscv: cache: Implement i/dcache [status, enable, disable] by Rick Chen · Wed Nov 07 09:34:06 2018 +0800
  8. 09db5fc riscv: do not reimplement generic io functions by Lukas Auer · Thu Nov 22 11:26:19 2018 +0100
  9. 78da26d riscv: make use of the barrier functions from Linux by Lukas Auer · Thu Nov 22 11:26:18 2018 +0100
  10. e429a1e riscv: fix use of incorrectly sized variables by Lukas Auer · Thu Nov 22 11:26:17 2018 +0100
  11. 401885a Use _AC and UL macros from linux/const.h by Baruch Siach · Sun Nov 11 12:31:01 2018 +0200
  12. 748dae2 riscv: Remove CSR read/write defines in encoding.h by Bin Meng · Wed Sep 26 06:55:15 2018 -0700
  13. 055700e riscv: Add a helper routine to print CPU information by Bin Meng · Wed Sep 26 06:55:14 2018 -0700
  14. ebd336f riscv: Remove mach type by Bin Meng · Wed Sep 26 06:55:09 2018 -0700
  15. d9eec24 riscv: Remove setup.h by Bin Meng · Wed Sep 26 06:55:07 2018 -0700
  16. 1359226 arch: types.h: factor out fixed width typedefs to int-ll64.h by Masahiro Yamada · Mon Aug 06 20:47:39 2018 +0900
  17. b66af37 riscv: cpu: nx25: Rename as ax25 by Rick Chen · Tue May 29 09:54:40 2018 +0800
  18. 9dbb973 SPDX: Convert single license tags to Linux Kernel style by Rick Chen · Tue May 29 14:10:06 2018 +0800
  19. 7ea64b0 riscv: Add board_quiesce_devices stub by Alexander Graf · Mon Apr 23 07:59:46 2018 +0200
  20. 3bb8f01 riscv: Add setjmp/longjmp code by Alexander Graf · Mon Apr 23 07:59:43 2018 +0200
  21. 435e382 riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit() by Bryan O'Donoghue · Mon Apr 30 15:56:04 2018 +0100
  22. 1c12981 riscv: Define PLATFORM__SET_BIT for generic_set_bit() by Bryan O'Donoghue · Mon Apr 30 15:56:03 2018 +0100
  23. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  24. 53b47b8 riscv: bootm: Remove ATAGS by Rick Chen · Tue Mar 13 14:59:41 2018 +0800
  25. 69ae630 riscv: checkpatch: Fix alignment should match open parenthesis by Rick Chen · Mon Feb 12 11:17:47 2018 +0800
  26. b34b4b9 riscv: checkpatch: Fix use of volatile by Rick Chen · Mon Feb 12 11:10:04 2018 +0800
  27. 5febadd riscv: checkpatch: Fix Macro argument reuse by Rick Chen · Mon Feb 12 11:07:58 2018 +0800
  28. 76c0a24 riscv: nx25: include: Add header files to support RISC-V by Rick Chen · Tue Dec 26 13:55:51 2017 +0800