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git01.mediatek.com
/
filogic
/
uboot
/
a6c078c5b0262834efc67ba6e3b81220e4955fbf
/
drivers
/
clk
/
uniphier
/
clk-uniphier-sys.c
5f9a871
clk: uniphier: Add missing USB SS-PHY clocks
by Kunihiko Hayashi
· Mon Feb 20 14:50:31 2023 +0900
04f1971
clk: uniphier: Add PCIe clock entry
by Kunihiko Hayashi
· Tue Jul 06 19:01:06 2021 +0900
ec4f6ba
clk: uniphier: add EMMC clock for LD11, LD20, and PXs3
by Masahiro Yamada
· Wed Jul 10 20:07:35 2019 +0900
cdc6f65
clk: uniphier: add NAND 200MHz clock
by Masahiro Yamada
· Wed Dec 19 20:03:20 2018 +0900
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
cb2f1d9
clk: uniphier: add ethernet clock control support
by Kunihiko Hayashi
· Wed Apr 18 10:05:33 2018 +0900
5d15b73
clk: uniphier: add NAND controller clock
by Masahiro Yamada
· Sat Oct 14 02:21:19 2017 +0900
52cdec0
clk: uniphier: add PXs3 clock data
by Masahiro Yamada
· Fri Oct 13 19:22:00 2017 +0900
4980668
clk: uniphier: rework for better clock tree structure
by Masahiro Yamada
· Fri Oct 13 19:21:59 2017 +0900
644f5bf
clk: uniphier: add System clock support
by Masahiro Yamada
· Tue Aug 29 01:06:15 2017 +0900