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git01.mediatek.com / filogic / uboot / a6b477ed187f3a7ffe4fc2b452424998539103f3 / include / dt-bindings / clock / mt7986-clk.h
  1. 07603e4 clk: mediatek: mt7986: rename CK to CLK by Christian Marangi · Sat Aug 03 10:40:48 2024 +0200
  2. 61c9220 clk: mediatek: mt7986: replace infracfg ID with upstream linux by Christian Marangi · Sat Aug 03 10:40:46 2024 +0200
  3. 6698b4d clk: mediatek: mt7986: move INFRA_TRNG_CK to the bottom of the list by Christian Marangi · Sat Aug 03 10:40:45 2024 +0200
  4. efc33e4 clk: mediatek: mt7986: comment out CK_TOP_A_TUNER as not used by Christian Marangi · Sat Aug 03 10:40:44 2024 +0200
  5. 0fc50e7 clk: mediatek: mt7986: drop 1/1 spurious factor for topckgen by Christian Marangi · Sat Aug 03 10:40:43 2024 +0200
  6. 83b17ec clk: mediatek: mt7986: reorder TOPCKGEN factor ID by Christian Marangi · Sat Aug 03 10:40:42 2024 +0200
  7. 9276f07 clk: mediatek: mt7986: rename TOPCKGEN factor clock to upstream naming by Christian Marangi · Sat Aug 03 10:40:41 2024 +0200
  8. 30c4b86 clk: mediatek: mt7986: fix typo for infra_i2c0_ck by Christian Marangi · Sat Aug 03 10:40:40 2024 +0200
  9. 6a89a38 clk: mediatek: mt7986: add missing entry for IPCIE_PIPE_CK infra gate by Christian Marangi · Sat Aug 03 10:40:39 2024 +0200
  10. ab4de13 clk: mediatek: mt7986: drop 1/1 infracfg spurious factor by Christian Marangi · Sat Aug 03 10:40:38 2024 +0200
  11. 7739a5f clk: mediatek: mt7986: rename 66M_MCK to SYSAXI_D2 by Christian Marangi · Sat Aug 03 10:40:36 2024 +0200
  12. 0178c61 clk: mediatek: mt7986: rename CB_CKSQ_40M to TOP_XTAL by Christian Marangi · Sat Aug 03 10:40:35 2024 +0200
  13. 37161fe clk: mediatek: add clock driver support for MediaTek MT7986 SoC by developer · Fri Sep 09 20:00:09 2022 +0800