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git01.mediatek.com
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filogic
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uboot
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a5176e04efdb06210f1430bb0f483ea247b1f370
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cpu
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mpc85xx
/
ddr-gen3.c
24aa71a
ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist
by Kumar Gala
· Tue Sep 01 22:01:54 2009 -0500
4be87b2
fsl-ddr: add the DDR3 SPD infrastructure
by Dave Liu
· Sat Mar 14 12:48:30 2009 +0800
e674b83
Fix mpc85xx ddr-gen3 ddr_sdram_cfg.
by Ed Swarthout
· Tue Feb 24 02:37:59 2009 -0600
30cb145
32bit BUg fix for DDR2 on 8572
by Poonam_Aggrwal-b10812
· Sun Jan 04 08:46:38 2009 +0530
7dc79f7
85xx: Fix the incorrect register used for DDR erratum1
by Dave Liu
· Thu Oct 23 21:18:53 2008 +0800
0383694
rename CFG_ macros to CONFIG_SYS
by Jean-Christophe PLAGNIOL-VILLARD
· Thu Oct 16 15:01:15 2008 +0200
d5a1fb9
FSL DDR: Add 85xx specific register setting
by Kumar Gala
· Tue Aug 26 21:34:55 2008 -0500