Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / a4f460d44558f6858c352ed3aca67c213279eb78 / drivers / clk / rockchip / clk_rk3399.c
  1. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  2. 10b594b rockchip: clk: rk3399: allow requests for HDMI clocks by Philipp Tomsich · Fri Apr 28 18:33:57 2017 +0200
  3. d10b45e rockchip: clk: rk3399: allow requests for PCLK_EFUSE1024NS by Philipp Tomsich · Fri Apr 28 17:11:55 2017 +0200
  4. 78a7314 rockchip: clk: rk3399: adapt MMC clk configuration to the updated RK3399 DTS by Philipp Tomsich · Tue Apr 25 09:52:06 2017 +0200
  5. 30d7c15 rockchip: clk: rk3399: fix off-by one during rate calculation in i2c/spi_set_rate by Philipp Tomsich · Thu Apr 20 22:05:50 2017 +0200
  6. c31ee92 rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5 by Philipp Tomsich · Thu Apr 20 22:05:49 2017 +0200
  7. 775bc39 rockchip: clk: rk3399: 24MHz is not a power of 2 by Philipp Tomsich · Fri Mar 24 19:35:37 2017 +0100
  8. bfa896c rockchip: clk: rk3399: add clocking support for Ethernet by Philipp Tomsich · Fri Mar 24 19:24:25 2017 +0100
  9. cf0a4ba rockchip: clk: rk3399: fix warnings for unused variables in SPL/non-SPL by Philipp Tomsich · Fri Mar 24 19:24:24 2017 +0100
  10. e198053 rockchip: clk: rk3399: update driver for spl by Kever Yang · Mon Feb 13 17:38:56 2017 +0800
  11. d1dfea7 rockchip: rk3399: Move rockchip_get_cru() out of the driver by Simon Glass · Sat Oct 01 20:04:51 2016 -0600
  12. 78b6c3f clk: rk3399: fix rockchip_get_cru by Jacob Chen · Tue Sep 27 15:48:45 2016 +0800
  13. e54d26a clk: rk3399: add pmucru controller support by Kever Yang · Fri Aug 12 17:47:15 2016 +0800
  14. dc850de clock: rk3399: add support for dwmmc 400K by Kever Yang · Thu Aug 04 11:44:58 2016 +0800
  15. 4776f0b move: rockchip: move clock drivers into a subdirectory by Heiko Stübner · Fri Jul 29 14:47:21 2016 +0200[Renamed from drivers/clk/clk_rk3399.c]
  16. ca19eac rk3399: add basic soc driver by Kever Yang · Fri Jul 29 10:35:25 2016 +0800