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git01.mediatek.com / filogic / uboot / a4f460d44558f6858c352ed3aca67c213279eb78 / arch / x86 / cpu / intel_common / car.S
  1. 8dda587 x86: Update microcode for secondary CPUs by Simon Glass · Fri Mar 11 22:07:11 2016 -0700
  2. 2df6188 x86: Move microcode code to a common location by Simon Glass · Fri Mar 11 22:06:54 2016 -0700
  3. 144652f x86: Move cache-as-RAM code into a common location by Simon Glass · Fri Mar 11 22:06:53 2016 -0700[Renamed from arch/x86/cpu/ivybridge/car.S]
  4. 5d12980 x86: ivybridge: Fix car_uninit() to correctly set run state by Simon Glass · Sun Oct 18 15:55:35 2015 -0600
  5. a9a4426 x86: Add multi-processor init by Simon Glass · Wed Apr 29 22:25:59 2015 -0600
  6. 9281eb5 x86: ivybridge: Update microcode early in boot by Simon Glass · Thu Jan 01 16:18:14 2015 -0700
  7. e591101 x86: ivybridge: Add a way to turn off the CAR by Simon Glass · Thu Jan 01 16:18:12 2015 -0700
  8. 7bf5b9e x86: Add support for MTRRs by Simon Glass · Thu Jan 01 16:18:07 2015 -0700
  9. 98f139b x86: chromebook_link: Implement CAR support (cache as RAM) by Simon Glass · Wed Nov 12 22:42:10 2014 -0700
  10. 0b36ecd x86: Add chromebook_link board by Simon Glass · Wed Nov 12 22:42:07 2014 -0700