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git01.mediatek.com / filogic / uboot / a3f4a85c6ddd585ecd9d89a8c970c6c5990a3605 / arch / blackfin / include / asm / clock.h
  1. 6cae4b2 blackfin: spi clock is in sysclk1 domain instead of sysclk0 by Scott Jiang · Fri May 30 16:43:34 2014 +0800
  2. 983a2a9 blackfin: add spi and i2c specific get clock functions by Sonic Zhang · Tue Jan 28 13:53:34 2014 +0800
  3. 06bc873 cosmetic: remove empty lines at the top of file by Masahiro Yamada · Tue Nov 05 11:28:48 2013 +0900
  4. dbfad02 blackfin: Correct early serial mess output in BYPASS boot mode. by Sonic Zhang · Fri Nov 30 17:39:32 2012 +0800
  5. c15c403 blackfin: Set correct early debug serial baudrate. by Sonic Zhang · Tue Feb 05 19:10:34 2013 +0800