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filogic
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a01866a02db403a31ad63f80542a33073ee54987
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arch
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riscv
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dts
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k210.dtsi
5b845a4
k210: dts: align plic node with Linux
by Niklas Cassel
· Tue Mar 01 10:35:42 2022 +0000
b2c0bb4
k210: dts: align fpioa node with Linux
by Damien Le Moal
· Tue Mar 01 10:35:41 2022 +0000
0a876d7
k210: dts: add missing power bus clocks
by Damien Le Moal
· Tue Mar 01 10:35:40 2022 +0000
6e5a8b7
k210: use the board vendor name rather than the marketing name
by Damien Le Moal
· Tue Mar 01 10:35:39 2022 +0000
e6638b4
k210: dts: Set PLL1 to the same rate as PLL0
by Sean Anderson
· Fri Jun 11 00:16:15 2021 -0400
72422b9
riscv: Don't reserve AI ram in k210 dts
by Sean Anderson
· Thu Apr 08 22:13:13 2021 -0400
b23d757
riscv: k210: Use AI as the parent clock of aisram, not PLL1
by Sean Anderson
· Thu Apr 08 22:13:12 2021 -0400
7be6d2b
riscv: k210: Rename airam to aisram
by Sean Anderson
· Thu Apr 08 22:13:11 2021 -0400
e8d9e3a
riscv: Enable some devices pre-relocation
by Sean Anderson
· Thu Apr 08 22:13:09 2021 -0400
1c30c0e
riscv: Add watchdog bindings for the k210
by Sean Anderson
· Wed Mar 10 21:02:21 2021 -0500
2ddd3e0
riscv: Add device tree bindings for SPI
by Sean Anderson
· Fri Oct 16 18:57:54 2020 -0400
fd9571a
spi: dw: Add SoC-specific compatible strings
by Sean Anderson
· Fri Oct 16 18:57:50 2020 -0400
d1b3321
riscv: k210: Reduce DMA block size
by Sean Anderson
· Mon Oct 12 14:18:15 2020 -0400
6870556
riscv: Add pinmux and gpio bindings for Kendryte K210
by Sean Anderson
· Mon Sep 14 11:02:04 2020 -0400
c6d0ef8
riscv: Update Kendryte device tree for new CLINT driver
by Sean Anderson
· Mon Sep 28 10:52:28 2020 -0400
d11b582
riscv: Add device tree for K210 and Sipeed Maix BitM
by Sean Anderson
· Wed Jun 24 06:41:23 2020 -0400