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git01.mediatek.com / filogic / uboot / 9e4af83497067b8a055753375f9e69f661fdf495 / arch / x86 / cpu / ivybridge
  1. 684818d x86: video: Allow video ROM execution to fall back to the other method by Simon Glass · Tue Jan 27 22:13:34 2015 -0700
  2. 461cebf x86: Rename MMCONF_BASE_ADDRESS and make it common across x86 by Simon Glass · Tue Jan 27 22:13:33 2015 -0700
  3. e860ee4 x86: ivybridge: Drop the Kconfig MRC cache information by Simon Glass · Mon Jan 19 22:16:16 2015 -0700
  4. 428dfa4 x86: Implement a cache for Memory Reference Code parameters by Simon Glass · Mon Jan 19 22:16:14 2015 -0700
  5. 9281eb5 x86: ivybridge: Update microcode early in boot by Simon Glass · Thu Jan 01 16:18:14 2015 -0700
  6. e591101 x86: ivybridge: Add a way to turn off the CAR by Simon Glass · Thu Jan 01 16:18:12 2015 -0700
  7. a754b95 x86: ivybridge: Request MTRRs for DRAM regions by Simon Glass · Thu Jan 01 16:18:10 2015 -0700
  8. 5a530b6 x86: ivybridge: Set up an MTRR for the video frame buffer by Simon Glass · Thu Jan 01 16:18:08 2015 -0700
  9. 7bf5b9e x86: Add support for MTRRs by Simon Glass · Thu Jan 01 16:18:07 2015 -0700
  10. 666534f x86: ivybridge: Drop support for ROM caching by Simon Glass · Thu Jan 01 16:18:06 2015 -0700
  11. 19ec76d x86: ivybridge: Only run the Video BIOS when video is enabled by Simon Glass · Thu Jan 01 16:18:02 2015 -0700
  12. 293f497 x86: Use consistent name XXX_ADDR for binary blob flash address by Bin Meng · Wed Dec 17 15:50:42 2014 +0800
  13. c8a5c41 x86: Correct problems in the microcode loading by Simon Glass · Mon Dec 15 22:02:41 2014 -0700
  14. 44679e7 x86: ivybridge: Update the microcode by Simon Glass · Mon Dec 15 22:02:40 2014 -0700
  15. 642d248 x86: Add post failure codes for bist and car by Bin Meng · Fri Dec 12 21:05:30 2014 +0800
  16. d90f8e1 x86: Add initial video device init for Intel GMA by Simon Glass · Fri Nov 14 20:56:36 2014 -0700
  17. 61612ed x86: ivybridge: Add northbridge init functions by Simon Glass · Mon Nov 24 21:18:18 2014 -0700
  18. cf46d37 x86: Add init for model 206AX CPU by Simon Glass · Mon Nov 24 21:18:16 2014 -0700
  19. 79248a1 x86: ivybridge: Set up XHCI USB by Simon Glass · Fri Nov 14 18:18:42 2014 -0700
  20. 194d757 x86: ivybridge: Set up EHCI USB by Simon Glass · Fri Nov 14 18:18:40 2014 -0700
  21. cd0adb3 x86: ivybridge: Add SATA init by Simon Glass · Fri Nov 14 18:18:38 2014 -0700
  22. 06409c9 x86: ivybridge: Add additional LPC init by Simon Glass · Fri Nov 14 18:18:35 2014 -0700
  23. f307708 x86: ivybridge: Add PCH init by Simon Glass · Fri Nov 14 18:18:34 2014 -0700
  24. 17f1c40 x86: ivybridge: Add support for BD82x6x PCH by Simon Glass · Fri Nov 14 18:18:32 2014 -0700
  25. 268eefd x86: ivybridge: Implement SDRAM init by Simon Glass · Wed Nov 12 22:42:28 2014 -0700
  26. d22f5c9 x86: ivybridge: Add LAPIC support by Simon Glass · Wed Nov 12 22:42:27 2014 -0700
  27. 30580fc x86: ivybridge: Add early init for PCH devices by Simon Glass · Wed Nov 12 22:42:23 2014 -0700
  28. f79d538 x86: ivybridge: Perform Intel microcode update on boot by Simon Glass · Wed Nov 12 22:42:21 2014 -0700
  29. 367077a x86: ivybridge: Check BIST value on boot by Simon Glass · Wed Nov 12 22:42:20 2014 -0700
  30. f226c41 x86: ivybridge: Perform initial CPU setup by Simon Glass · Wed Nov 12 22:42:19 2014 -0700
  31. dcfac35 x86: ivybridge: Add early LPC init so that serial works by Simon Glass · Wed Nov 12 22:42:15 2014 -0700
  32. 3274ae0 x86: ivybridge: Enable PCI in early init by Simon Glass · Wed Nov 12 22:42:13 2014 -0700
  33. 98f139b x86: chromebook_link: Implement CAR support (cache as RAM) by Simon Glass · Wed Nov 12 22:42:10 2014 -0700
  34. 0b36ecd x86: Add chromebook_link board by Simon Glass · Wed Nov 12 22:42:07 2014 -0700