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git01.mediatek.com / filogic / uboot / 9ceda68ea3ddf04a57f9017116402ca819abb462 / drivers / clk / qcom / clock-sdm845.c
  1. 397c84f clk/qcom: fix rcg divider value by Caleb Connolly · Tue Nov 07 12:41:05 2023 +0000
  2. fbacc67 clk/qcom: add mnd_width to clk_rcg_set_rate_mnd() by Caleb Connolly · Tue Nov 07 12:41:04 2023 +0000
  3. 10a0abb clk/qcom: use function pointers for enable and set_rate by Caleb Connolly · Tue Nov 07 12:41:03 2023 +0000
  4. 7a63294 clk/qcom: sdm845: add register map for simple gate clocks by Caleb Connolly · Tue Nov 07 12:41:02 2023 +0000
  5. 6c0b844 clk/qcom: handle resets and clocks in one device by Konrad Dybcio · Tue Nov 07 12:41:01 2023 +0000
  6. 878b26a clk/qcom: move from mach-snapdragon by Caleb Connolly · Tue Nov 07 12:40:59 2023 +0000[Renamed (98%) from arch/arm/mach-snapdragon/clock-sdm845.c]
  7. 1d1ca6e clocks: qcom: Add clock enable callback support by Sumit Garg · Thu Aug 04 19:57:14 2022 +0530
  8. 8bdffc3 clocks: sdm845: Import qcom,gcc-sdm845.h by Sumit Garg · Tue Jul 12 12:42:06 2022 +0530
  9. 038f2b9 clocks: qcom: add clocks for SDM845 debug uart by Dzmitry Sankouski · Sun Oct 17 13:44:30 2021 +0300