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git01.mediatek.com / filogic / uboot / 9bec7956050f609ef60656f517dbddfce0400469 / drivers / clk / clk-ti-sci.c
  1. 9bc1564 dm: core: Create a new header file for 'compat' features by Simon Glass · Mon Feb 03 07:36:16 2020 -0700
  2. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  3. 2cdd3f4 clk: Rename free() to rfree() by Simon Glass · Mon Feb 03 07:35:54 2020 -0700
  4. 74fc6b8 clk: sci-clk: add slack to clk-set-rate passed to firmware by Lokesh Vutla · Fri Jan 17 11:57:30 2020 +0530
  5. 280d7a8 clk: clk-ti-sci: Notify AVS driver upon setting clock rate by Keerthy · Thu Oct 24 15:00:47 2019 +0530
  6. 1530e35 clk: Introduce TI System Control Interface (TI SCI) clock driver by Andreas Dannenberg · Mon Aug 27 15:57:43 2018 +0530