Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
9b4ca921c53a803ad119f8c430966f3290ce39c7
/
arch
/
arm
/
include
/
asm
/
arch-sunxi
/
clock_sun6i.h
9b4ca92
sunxi: Add clock support for DE2/HDMI/TCON on newer SoCs
by Jernej Skrabec
· Mon Mar 27 19:22:31 2017 +0200
5eddcbb
sunxi: Set PLL lock enable bits for R40
by Chen-Yu Tsai
· Wed Nov 30 16:54:34 2016 +0800
5fb9743
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol
by Andre Przywara
· Thu Feb 16 01:20:27 2017 +0000
f613817
sunxi: A64: use H3 DRAM initialization code for A64 as well
by Jens Kuske
· Mon Jan 02 11:48:42 2017 +0000
213407e
sunxi: Tune H3 DRAM PLL to improve lock time
by Jens Kuske
· Fri Aug 19 13:40:46 2016 +0200
d194c0e
net: Add EMAC driver for H3/A83T/A64 SoCs.
by Amit Singh Tomar
· Wed Jul 06 17:59:44 2016 +0530
2c885e9
sunxi: Downclock AHB1 to 100MHz on Allwinner A64
by Siarhei Siamashka
· Tue May 31 01:48:05 2016 +0300
26c50fb
sunxi: Add support for Allwinner A64 SoCs
by Siarhei Siamashka
· Tue Mar 29 17:29:10 2016 +0200
a1f5d11
sunxi: H3: Add support for the host usb-phys
by Jelle van der Waa
· Tue Feb 09 23:59:33 2016 +0100
6daddfe
sunxi: Support H3 CCU security switches
by Chen-Yu Tsai
· Wed Jan 06 15:13:07 2016 +0800
ff308f8
sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs
by Hans de Goede
· Fri Nov 20 19:29:49 2015 +0100
2b8bd91
sunxi: clock: Set AHB1 clock frequency to 200MHz on Allwinner H3
by Siarhei Siamashka
· Fri Nov 20 07:07:48 2015 +0200
53f018e
sunxi: Add H3 DRAM initialization support
by Jens Kuske
· Tue Nov 17 15:12:59 2015 +0100
d6eaadc
sun6i: clock: Add support for the mipi pll
by Hans de Goede
· Sat Aug 08 14:05:35 2015 +0200
957a72729
sunxi: clock: Add clock_get_pll3() helper function
by Hans de Goede
· Sat Aug 08 12:36:44 2015 +0200
ead68b6
sunxi: display: Add a few extra register and constant defines
by Hans de Goede
· Mon Aug 03 19:45:37 2015 +0200
2b735ad
sunxi: Match sun4i, sun6i, sun9i CCI definitions for NAND and DMA
by Roy Spliet
· Tue May 26 17:00:41 2015 +0200
5f67b86
sunxi: video: Fix lvds panel support for sun6i+
by Hans de Goede
· Thu May 14 18:52:54 2015 +0200
804fa57
sunxi: ohci: Add ohci usb host controller support
by Hans de Goede
· Sun May 10 14:10:27 2015 +0200
0fdbe20
sunxi: Add support for A33 PLL11 (second DRAM pll)
by Hans de Goede
· Sun Apr 12 11:46:41 2015 +0200
bf880fe
sunxi: Add a GMAC Transmit Clock Delay Chain Kconfig option
by Hans de Goede
· Sun Jan 25 12:10:48 2015 +0100
d5c48ae
sunxi: Move clock_get_pllX / clock_set_pllX protos to mach specific headers
by Hans de Goede
· Wed Jan 14 19:17:15 2015 +0100
e7b852a
sunxi: usbc: Add support for usb0 to the common usbc code
by Hans de Goede
· Wed Jan 07 15:26:06 2015 +0100
a144198
sunxi: Move usb-controller init code out of ehci-sunxi.c for reuse for otg
by Hans de Goede
· Wed Jan 07 15:08:43 2015 +0100
c5a3b4b
sunxi: video: Modify sunxi_lcdc_pll_set to work with both tcon0 and tcon1
by Hans de Goede
· Sun Dec 21 16:27:45 2014 +0100
645d4d5
sunxi: Fix PLL1 running at half speed on sun8i
by Hans de Goede
· Sat Dec 27 17:56:59 2014 +0100
966d239
sun8i: Add dram initialization support
by Hans de Goede
· Sun Dec 07 14:34:27 2014 +0100
0cbc4cb
sun6i: Add a sigma_delta_enable paramter to clock_set_pll5()
by Hans de Goede
· Sun Nov 30 11:58:17 2014 +0100
06bfab0
sunxi: mmc: Properly setup mod-clk and clock sampling phases
by Hans de Goede
· Sun Dec 07 20:55:10 2014 +0100
07be6d6
sun6i: Add sunxi_get_ss_bonding_id() function
by Hans de Goede
· Sat Nov 15 22:55:53 2014 +0100
1a9a6fb
sun6i: Add gmac support for sun6i boards
by Hans de Goede
· Fri Nov 21 17:19:45 2014 +0100
70d7ab5
sunxi: Add video pll clock functions
by Hans de Goede
· Sat Nov 08 14:07:27 2014 +0100
b5ab8ce
sun6i: ehci: Add sun6i ehci support
by Hans de Goede
· Fri Nov 07 14:51:12 2014 +0100
c27d68d
sun6i: Add clock functions needed for SPL / DRAM init
by Hans de Goede
· Sat Oct 25 20:16:33 2014 +0200
3a04542
ARM: sun6i: Add clock support
by Chen-Yu Tsai
· Fri Oct 03 20:16:25 2014 +0800