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git01.mediatek.com / filogic / uboot / 99ebfbf7af26777f7caab51779fd4333418253d6 / drivers / timer / riscv_timer.c
  1. dec7ea0 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" by Tom Rini · Mon May 20 13:35:03 2024 -0600
  2. abb9a04 Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" by Tom Rini · Sat May 18 20:20:43 2024 -0600
  3. fca3cd4 timer: Remove <common.h> and add needed includes by Tom Rini · Wed May 01 19:31:27 2024 -0600
  4. d0903f4 riscv: timer: add timer_get_boot_us for BOOTSTAGE by Chanho Park · Wed Sep 06 14:18:13 2023 +0900
  5. 002858c riscv: allow riscv timer to be instantiated via device tree by Torsten Duwe · Mon Aug 14 18:05:28 2023 +0200
  6. 02038c3 riscv: timer: Add support for an early timer by Pragnesh Patel · Sun Jan 17 18:11:25 2021 +0530
  7. 947fc2d timer: Return count from timer_ops.get_count by Sean Anderson · Wed Oct 07 14:37:44 2020 -0400
  8. 9baaaef riscv: Rework riscv timer driver to only support S-mode by Sean Anderson · Mon Sep 28 10:52:21 2020 -0400
  9. 2539903 timer: Add generic driver for RISC-V privileged architecture defined timer by Bin Meng · Wed Dec 12 06:12:27 2018 -0800