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git01.mediatek.com / filogic / uboot / 97979a266a25d372b266ac4435cfe49622f4c9ab / arch / arm / cpu / tegra30-common / clock.c
  1. 289fc68 ARM: tegra: Provide PCIEXCLK reset ID by Thierry Reding · Tue Dec 09 22:25:07 2014 -0700
  2. 4bf9869 ARM: tegra: Implement tegra_plle_enable() by Thierry Reding · Tue Dec 09 22:25:06 2014 -0700
  3. 2a544db ARM: tegra: don't exceed AVP limits when configuring PLLP by Jimmy Zhang · Fri Jan 24 10:37:36 2014 -0700
  4. 510c0ae ARM: tegra: rename MASK_BITS_29_28 to MASK_BITS_31_28 by Stephen Warren · Fri Jan 24 10:16:18 2014 -0700
  5. ea21e76 ARM: tegra: deduplicate MASK_BITS_xxx clock mux enum by Tom Warren · Fri Jan 24 10:16:17 2014 -0700
  6. fbef355 Tegra114: Initialize System Counter (TSC) with osc frequency by Tom Warren · Mon Apr 01 15:48:54 2013 -0700
  7. 3f419f8 tegra30: add SBC1 to periph id mapping table by Allen Martin · Tue Jan 29 13:51:25 2013 +0000
  8. 795f9d7 Tegra: Move common clock code to arch/arm/cpu/tegra-common/clock.c by Tom Warren · Wed Jan 23 14:01:01 2013 -0700
  9. ea22604 Tegra30: clocks: Fix clock tables for I2C and other periphs by Tom Warren · Fri Dec 21 15:02:45 2012 -0700
  10. 61c6d0e Tegra30: Add common CPU (shared) files by Tom Warren · Tue Dec 11 13:34:15 2012 +0000