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git01.mediatek.com / filogic / uboot / 9639361d6315a3cf37e53fd2f749f750cc411701 / board / xes / common / fsl_8xxx_clk.c
  1. 8c70baa Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig by Tom Rini · 3 years ago
  2. aea2a99 CONFIG_SYS_CLK_FREQ: Consistently be static or get_board_sys_clk() by Tom Rini · 3 years ago
  3. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  4. 4b08dd7 powerpc: P2020: Remove macro CONFIG_P2020 by York Sun · 8 years ago
  5. bd8ec7e Coding Style cleanup: remove trailing white space by Wolfgang Denk · 11 years ago
  6. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · 11 years ago
  7. 9a0709d XPedite5500 board support by John Schmoller · 14 years ago
  8. 2b1a48d xes: Use proper IO access functions by Peter Tyser · 15 years ago
  9. 281e41d xes: Update Freescale clock code to work with 86xx processors by Peter Tyser · 16 years ago[Renamed (86%) from board/xes/common/fsl_8572_clk.c]
  10. 1c2b329 XPedite5370 board support by Peter Tyser · 16 years ago