1. f217316 powerpc/mpc85xx: fix TLB alignment by Scott Wood · 12 years ago
  2. d6a8288 powerpc/mpc85xx: move debug tlb entry after TLB is in known state by Scott Wood · 12 years ago
  3. c3d87b1 powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 by York Sun · 12 years ago
  4. 0f2f2a3 powerpc/mpc85xx: Introduce new macros to add and delete TLB entries by York Sun · 12 years ago
  5. 2bfa0f4 powerpc/85xx: clear out TLB on boot by Scott Wood · 12 years ago
  6. 8080696 powerpc/fsl-corenet: work around erratum A004510 by Scott Wood · 12 years ago
  7. 258120c mpc85xx: Initial SP alignment is wrong. by Joakim Tjernlund · 12 years ago
  8. 5735fe1 powerpc/85xx:Fix NAND code base to support debugger by Prabhakar Kushwaha · 13 years ago
  9. bc8d57c powerpc/85xx:Make debug exception vector accessible by Prabhakar Kushwaha · 13 years ago
  10. 8f3e892 powerpc/85xx:Fix MSR[DE] bit in MSR to support debugger by Prabhakar Kushwaha · 13 years ago
  11. e5eceec powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR by Timur Tabi · 13 years ago
  12. 4a66422 powerpc/85xx:Avoid vector table compilation for nand_spl by Prabhakar Kushwaha · 13 years ago
  13. f838786 powerpc/85xx:Fix IVORs addr after vector table relocation by Prabhakar Kushwaha · 13 years ago
  14. 2153b57 powerpc/85xx:Avoid hardcoded vector address for IVORs by Prabhakar Kushwaha · 13 years ago
  15. 945e59a powerpc/85xx: Add workaround for erratum CPU-A003999 by Kumar Gala · 13 years ago
  16. c9a1b77 powerpc/85xx: resize the boot page TLB before relocating CCSR by Timur Tabi · 13 years ago
  17. c19b068 powerpc/85xx: verify the current address of CCSR before relocating it by Timur Tabi · 13 years ago
  18. 2217182 powerpc/85xx: add some missing sync instructions in the CCSR relocation code by Timur Tabi · 13 years ago
  19. 40402f0 powerpc/85xx: fix some comments in the CCSR relocation code by Timur Tabi · 13 years ago
  20. 8ca8d82 powerpc/p4080: Add support for secure boot flow by Ruchika Gupta · 14 years ago
  21. e769dea powerpc/85xx: relocate CCSR before creating the initial RAM area by Timur Tabi · 13 years ago
  22. c83e7ef powerpc/85xx: provide 85xx flush_icache for cmd_cache by Matthew McClintock · 14 years ago
  23. 61d0195 unify version_string by Andreas Bießmann · 13 years ago
  24. b2d36ea Revert "PowerPC: Add support for -msingle-pic-base" by Wolfgang Denk · 14 years ago
  25. 5d98e16 PowerPC: Add support for -msingle-pic-base by Joakim Tjernlund · 14 years ago
  26. cedbf4b rename _end to __bss_end__ by Po-Yu Chuang · 14 years ago
  27. fa103bf powerpc/85xx: Fix bug in dcache_disable by Kumar Gala · 14 years ago
  28. 401b592 PowerPC: Don't destroy fixup table while doing fixups by Joakim Tjernlund · 14 years ago
  29. 439a7bf powerpc/85xx: rename CONFIG_SYS_TEXT_BASE to CONFIG_SYS_MONITOR_BASE by Haiying Wang · 14 years ago
  30. 0191e47 Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value by Wolfgang Denk · 14 years ago
  31. c61b25a powerpc: do not fixup NULL ptrs by Joakim Tjernlund · 14 years ago
  32. 0708bc6 Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE by Wolfgang Denk · 14 years ago
  33. 0c44caf powerpc: Remove warm reset entry point by Peter Tyser · 14 years ago
  34. c609332 powerpc/85xx: Move INIT_RAM_ADDR physical address to 36-bit space by york · 14 years ago
  35. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc85xx/start.S]
  36. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc85xx/start.S]
  37. 8709aed 85xx: Set HID1[mbdd] on e500v2 rev5.0 or greater by Sandeep Gopalpet · 15 years ago
  38. 5530cb8 85xx: Add defines for BUCSR bits to make code more readable by Kumar Gala · 15 years ago
  39. 48bd5f0 85xx: Fix enabling of L1 cache parity on secondary cores by Kumar Gala · 15 years ago
  40. 3fbaa4d ppc: Use r12 instead of r14 as GOT pointer. by Joakim Tjernlund · 15 years ago
  41. 4ff6bc0 ppc: Loose GOT access in IRQ by Joakim Tjernlund · 15 years ago
  42. 8d2817c 85xx: Add support for e500mc cache stashing by Kumar Gala · 16 years ago
  43. 4f2fdac relocation: Do not relocate NULL pointers. by Joakim Tjernlund · 15 years ago
  44. 0255cd7 ppc/85xx: add boot from NAND/eSDHC/eSPI support by Mingkai Hu · 15 years ago
  45. c417c91 ppc/85xx: Introduce low level write_tlb function by Kumar Gala · 15 years ago
  46. 31e6010 ppc/85xx: Ensure that MAS8 is zero when writing TLB entries. by Scott Wood · 15 years ago
  47. 4211596 ppc/85xx: Don't enable interrupts before we're ready by Scott Wood · 15 years ago
  48. c24a905 85xx: Add support for setting IVORs to fixed offset defaults by Kumar Gala · 15 years ago
  49. c984913 MPC85xx: Add MPC8569 CPU support by Haiying Wang · 16 years ago
  50. e56f2c5 85xx: Add support for additional e500mc features by Kumar Gala · 16 years ago
  51. 68aec14 85xx: Fix the boot window issue by Dave Liu · 16 years ago
  52. 6294850 Update U-Boot's build timestamp on every compile by Peter Tyser · 16 years ago
  53. 9f4a689 85xx: Add basic e500mc core support by Kumar Gala · 16 years ago
  54. 5c953ca 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number by Kumar Gala · 16 years ago
  55. 32090b3 85xx: Export invalidate_{i,d}cache and add flush_dcache by Kumar Gala · 16 years ago
  56. 0383694 rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago
  57. 0470c52 Change the temp map to ROM to align addresses to page size. by Andrew Klossner · 16 years ago
  58. a1be476 Big white-space cleanup. by Wolfgang Denk · 17 years ago
  59. 2a44121 85xx: Don't icbi when unlocking the cache by Kumar Gala · 17 years ago
  60. 5ba61fe Invalidate INIT_RAM TLB mappings by Andy Fleming · 17 years ago
  61. 86a28e9 ppc: Refactor cache routines, so there is only one common set. by Rafal Jaworowski · 17 years ago
  62. 9772ee7 85xx: Reworked initial processor init by Kumar Gala · 17 years ago
  63. df359c5 85xx: Remove old style of LAW init by Kumar Gala · 17 years ago
  64. 95fd2f6 85xx: Move LAW init code into C by Kumar Gala · 17 years ago
  65. 938e14e 85xx: Remove cache config from configs.h by Kumar Gala · 17 years ago
  66. f7a7f08 Cleanup coding style; update CHANGELOG by Wolfgang Denk · 17 years ago
  67. e9f4e34 MSR overwrite fix by urwithsughosh@gmail.com · 17 years ago
  68. 91510e0 Remove magic numbers from cache related operations for mpc85xx by Kumar Gala · 17 years ago
  69. 7d6be30 85xx io out functions need sync after write. by Ed Swarthout · 17 years ago
  70. 76e276b Use an absolute address when jumping out of 4k boot page by Kumar Gala · 17 years ago
  71. f08233c 85xx start.S cleanup and exception support by Andy Fleming · 17 years ago
  72. 06244e4 [ppc] Fix build breakage for all non-4xx PowerPC variants. by Rafal Jaworowski · 17 years ago
  73. 077fb1a u-boot: v2: Remove the fixed TLB and LAW entrynubmer by Zang Roy-r61911 · 18 years ago
  74. ac6c4e7 Fix bug in [id]cache_status commands for MPC85xx processors; by Wolfgang Denk · 19 years ago
  75. 9da240c Added support for KwikByte KB920x boards (based on AT91RM9200) by Wolfgang Denk · 19 years ago
  76. 29dcbd4 E500 update: repoint IVPR to RAM when code is relocated by Wolfgang Denk · 19 years ago
  77. 355da03 Merge with /home/wd/git/u-boot/master by Wolfgang Denk · 19 years ago
  78. c94dea2 Fix typos in cpu/85xx/start.S which caused DataTLB exception to be by Wolfgang Denk · 19 years ago
  79. 61e6195 * Patch by Ron Alder, 11 July 2005 by Lunsheng Wang · 19 years ago
  80. 77a4f6e * Patch by Jon Loeliger, 2005-05-05 by Jon Loeliger · 19 years ago
  81. f3da7cc Fix timer handling on MPC85xx systems by wdenk · 20 years ago
  82. 492b9e7 Patch by Jon Loeliger, 16 Jul 2004: by wdenk · 20 years ago
  83. 13eb221 Patch by Jon Loeliger, 17 June 2004: by wdenk · 20 years ago
  84. a445ddf Patches Part 1 by Jon Loeliger, 11 May 2004: by wdenk · 20 years ago
  85. a983cc2 * Patch by Xiao Xianghua, 23 Oct 2003: small patch for mpc85xx by wdenk · 21 years ago
  86. 9c53f40 * Patches by Xianghua Xiao, 15 Oct 2003: by wdenk · 21 years ago