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git01.mediatek.com / filogic / uboot / 93afc872ef7f6f3adeaaa672217f559d5db9df58 / arch / arm / include / asm / arch-socfpga
  1. 10d72dc socfpga: correctly increment freeze_controller_base address by Dinh Nguyen · Wed Nov 26 12:14:33 2014 -0600
  2. cd9440b socfpga: add missing struct member fifo_triple_byte by Dinh Nguyen · Wed Nov 26 12:14:32 2014 -0600
  3. 7962c40 arm: socfpga: Add missing DW master SPI clock prototyp to clock_manager.h by Stefan Roese · Sun Nov 16 12:47:00 2014 +0100
  4. ca6b8fb arm: socfpga: Add socfpga_spim_enable() to reset_manager.c by Stefan Roese · Fri Nov 07 13:50:30 2014 +0100
  5. 76ba23f arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target by Stefan Roese · Fri Nov 07 14:10:41 2014 +0100
  6. ea0123c arm: socfpga: Zap spl.h and ad-hoc related syms by Marek Vasut · Thu Oct 16 12:25:40 2014 +0200
  7. 9867ede arm: socfpga: nic301: Add NIC-301 GPV register file by Marek Vasut · Mon Sep 15 06:03:38 2014 +0200
  8. 8da06a4 arm: socfpga: scu: Add SCU register file by Marek Vasut · Mon Sep 15 06:28:01 2014 +0200
  9. 8d8c648 arm: socfpga: reset: Add function to reset FPGA bridges by Marek Vasut · Mon Sep 08 14:08:45 2014 +0200
  10. c721380 arm: socfpga: fpga: Add SoCFPGA FPGA programming interface by Pavel Machek · Mon Sep 08 14:08:45 2014 +0200
  11. 57d75eb arm: socfpga: misc: Add proper ethernet initialization by Pavel Machek · Mon Sep 08 14:08:45 2014 +0200
  12. c38c869 arm: socfpga: reset: Add EMAC reset functions by Marek Vasut · Mon Sep 08 14:08:45 2014 +0200
  13. 43e9c40 arm: socfpga: clock: Sync with reference code by Marek Vasut · Tue Sep 16 19:54:32 2014 +0200
  14. e0098b37 arm: socfpga: clock: Clean up bit definitions by Marek Vasut · Tue Sep 16 17:21:00 2014 +0200
  15. 7c8d5a6 arm: socfpga: clock: Add code to read clock configuration by Pavel Machek · Mon Sep 08 14:08:45 2014 +0200
  16. df4c613 arm: socfpga: clock: Implant order into bit definitions by Marek Vasut · Sat Sep 13 07:21:16 2014 +0200
  17. 6141272 arm: socfpga: sysmgr: Clean up system manager by Marek Vasut · Mon Sep 08 14:08:45 2014 +0200
  18. 56a00ab arm: socfpga: Add watchdog disable for socfpga by Pavel Machek · Tue Sep 09 14:03:28 2014 +0200
  19. bd78d81 arm: socfpga: Clean up base address file by Marek Vasut · Mon Sep 15 01:44:39 2014 +0200
  20. 41bfe82 arm: socfpga: Complete the list of base addresses by Pavel Machek · Tue Sep 09 14:05:39 2014 +0200
  21. ce340e9 socfpga: initialize designware ethernet by Pavel Machek · Mon Jul 14 14:14:17 2014 +0200
  22. 112cb0d socfpga: Fix SOCFPGA build error for Altera dev kit by Chin Liang See · Tue Jul 22 04:28:35 2014 -0500
  23. 91c2f8f socfpga: fix clock manager register definition by Pavel Machek · Sat Jul 19 23:57:59 2014 +0200
  24. 6355024 socfpga: Adding Scan Manager driver by Chin Liang See · Tue Jun 10 01:17:42 2014 -0500
  25. 561c9d4 socfpga: Adding DesignWare watchdog support by Chin Liang See · Tue Jun 10 01:11:04 2014 -0500
  26. cb35060 socfpga: Adding Clock Manager driver by Chin Liang See · Tue Mar 04 22:13:53 2014 -0600
  27. cca9f45 socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA by Chin Liang See · Mon Dec 30 18:26:14 2013 -0600
  28. 6ae4473 socfpga: Adding Freeze Controller driver by Chin Liang See · Mon Dec 02 12:01:39 2013 -0600
  29. 70fa4e7 socfpga: Adding System Manager driver by Chin Liang See · Wed Sep 11 11:24:48 2013 -0500
  30. 1922dad socfpga: Creating driver for Reset Manager by Chin Liang See · Wed Aug 07 10:08:03 2013 -0500
  31. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  32. ad51f7c ARM: Add Altera SOCFPGA Cyclone5 by Dinh Nguyen · Thu Oct 04 06:46:02 2012 +0000