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git01.mediatek.com / filogic / uboot / 932596fa0d7370b1c24affabadecef0d02d126d6 / arch / arm / mach-socfpga / clock_manager_arria10.c
  1. ec472e0 ARM: socfpga: Sync A10 clock manager binding parser by Marek Vasut · Sat May 12 00:09:21 2018 +0200
  2. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  3. bdfb5c4 Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR by Tom Rini · Wed Apr 18 13:50:47 2018 -0400
  4. 7473932 SOCFPGA: clock manager: implement dw_spi_get_clk function by Eugeniy Paltsev · Thu Dec 28 15:09:02 2017 +0300
  5. ca40f29 arm: socfpga: Add clock driver for Arria 10 by Ley Foon Tan · Wed Apr 26 02:44:39 2017 +0800