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git01.mediatek.com / filogic / uboot / 92a87b3e7c46d7e413e10fecf218d4b376289683 / include / stm32_rcc.h
  1. 7264aae clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock by Patrice Chotard · Wed Apr 11 17:07:45 2018 +0200
  2. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  3. ef77287 clk: clk_stm32f: Fix stm32_clk_get_rate() for timer by Patrice Chotard · Wed Feb 07 10:44:46 2018 +0100
  4. d11d391 stm32: migrate clock structs in include/stm32_rcc.h by Patrice Chotard · Wed Nov 15 13:14:53 2017 +0100
  5. 369d483 clk: clk_stm32fx: add clock configuration for mmc usage by Patrice Chotard · Wed Nov 15 13:14:52 2017 +0100
  6. 03f10a1 dm: misc: bind STM32F4/F7 clock from rcc MFD driver by Patrice Chotard · Wed Nov 15 13:14:51 2017 +0100