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git01.mediatek.com / filogic / uboot / 91bbb3bd0e94941ef8a0a91df079dfa502485d8c / include / dt-bindings / clock / mt7981-clk.h
  1. f245164 clk: mediatek: mt7981: rename CK to CLK by Christian Marangi · Fri Aug 02 15:53:15 2024 +0200
  2. 8247bfd clk: mediatek: mt7981: replace infracfg ID with upstream linux by Christian Marangi · Fri Aug 02 15:53:12 2024 +0200
  3. bc63482 clk: mediatek: mt7981: drop 1/1 spurious factor by Christian Marangi · Fri Aug 02 15:53:11 2024 +0200
  4. 4fd1445 clk: mediatek: mt7981: fix typo for infra_i2c0_ck by Christian Marangi · Fri Aug 02 15:53:03 2024 +0200
  5. 14077e7 clk: mediatek: mt7981: add missing clock for infra_ipcie_pipe by Christian Marangi · Fri Aug 02 15:53:02 2024 +0200
  6. 79128da clk: mediatek: add clock driver support for MediaTek MT7981 SoC by developer · Fri Sep 09 20:00:12 2022 +0800