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git01.mediatek.com / filogic / uboot / 9100c0fd11f8b9c85f6b52b5c50497b1b607d40a / arch / arm / mach-uniphier / include / mach / ddrphy-regs.h
  1. 9100c0f ARM: uniphier: rename DTCR_RNKEN_* register bit to DTCR_RANKEN_* by Masahiro Yamada · Wed Dec 16 10:42:29 2015 +0900
  2. 75f16f8 ARM: uniphier: allow to enable multiple SoCs by Masahiro Yamada · Tue Sep 22 00:27:39 2015 +0900
  3. 1fa0b01 ARM: uniphier: rename CONFIG_MACH_* to CONFIG_ARCH_UNIPHIER_* by Masahiro Yamada · Tue Sep 22 00:27:34 2015 +0900
  4. 7a5a05a ARM: UniPhier: update DDR PHY register map for PH1-Pro5 by Masahiro Yamada · Fri May 29 17:30:08 2015 +0900
  5. 0af00a2 ARM: UniPhier: move SoC headers to mach-uniphier/include/mach by Masahiro Yamada · Fri Feb 27 02:26:43 2015 +0900[Renamed from arch/arm/include/asm/arch-uniphier/ddrphy-regs.h]
  6. fa42794 ARM: UniPhier: remove __packed that causes a problem on GCC 4.9 by Masahiro Yamada · Wed Jan 07 19:41:38 2015 +0900
  7. 04191e5 ARM: UniPhier: add DDR PHY training code by Masahiro Yamada · Fri Dec 19 20:20:52 2014 +0900