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filogic
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uboot
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8ff47f7fa7e8e0493ed615151923f783a9d2cf88
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arch
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riscv
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include
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asm
c308e01
riscv: add option to wait for ack from secondary harts in smp functions
by Lukas Auer
· Sun Dec 08 23:28:51 2019 +0100
211be3b
gpio: sifive: add support for DM based gpio driver for FU540-SoC
by Sagar Shrikant Kadam
· Tue Oct 01 10:00:46 2019 -0700
396f0bd
riscv: add SPL support
by Lukas Auer
· Wed Aug 21 21:14:45 2019 +0200
6134659
riscv: add run mode configuration for SPL
by Lukas Auer
· Wed Aug 21 21:14:43 2019 +0200
f942636
riscv: Access CSRs using CSR numbers
by Bin Meng
· Wed Jul 10 23:43:13 2019 -0700
a27264c
riscv: Sync csr.h with Linux kernel v5.2
by Bin Meng
· Wed Jul 10 23:43:12 2019 -0700
9cce6f7
env: Drop environment.h header file where not needed
by Simon Glass
· Thu Aug 01 09:47:12 2019 -0600
e5e6c36
riscv: Introduce CONFIG_XIP to support booting from flash
by Rick Chen
· Tue Apr 30 13:49:33 2019 +0800
7376677
riscv: Add a SYSCON driver for Andestech's PLMT
by Rick Chen
· Tue Apr 02 15:56:40 2019 +0800
6df4ed0
riscv: Add a SYSCON driver for Andestech's PLIC
by Rick Chen
· Tue Apr 02 15:56:39 2019 +0800
a359665
riscv: add support for multi-hart systems
by Lukas Auer
· Sun Mar 17 19:28:37 2019 +0100
9c03845
riscv: import the supervisor binary interface header file
by Lukas Auer
· Sun Mar 17 19:28:33 2019 +0100
83d573d
riscv: add infrastructure for calling functions on other harts
by Lukas Auer
· Sun Mar 17 19:28:32 2019 +0100
818d49a
riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd
by Anup Patel
· Mon Feb 25 08:15:33 2019 +0000
6f07f45
riscv: Add place-holder asm/arch/clk.h for driver compilation
by Anup Patel
· Mon Feb 25 08:14:24 2019 +0000
928452a
riscv: Add asm/dma-mapping.h for DMA mappings
by Anup Patel
· Mon Feb 25 08:14:17 2019 +0000
89681a7
riscv: Save boot hart id to the global data
by Bin Meng
· Wed Dec 12 06:12:45 2018 -0800
9e9e6fe
riscv: Add indirect stringification to csr_xxx ops
by Bin Meng
· Wed Dec 12 06:12:39 2018 -0800
731e2d4
riscv: Add exception codes for xcause register
by Bin Meng
· Wed Dec 12 06:12:37 2018 -0800
ea5086b
riscv: Add CSR numbers
by Bin Meng
· Wed Dec 12 06:12:36 2018 -0800
b6ee5e1
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
by Bin Meng
· Wed Dec 12 06:12:30 2018 -0800
89b3934
riscv: Add kconfig option to run U-Boot in S-mode
by Anup Patel
· Mon Dec 03 10:57:40 2018 +0530
842d580
riscv: cache: Implement i/dcache [status, enable, disable]
by Rick Chen
· Wed Nov 07 09:34:06 2018 +0800
09db5fc
riscv: do not reimplement generic io functions
by Lukas Auer
· Thu Nov 22 11:26:19 2018 +0100
78da26d
riscv: make use of the barrier functions from Linux
by Lukas Auer
· Thu Nov 22 11:26:18 2018 +0100
e429a1e
riscv: fix use of incorrectly sized variables
by Lukas Auer
· Thu Nov 22 11:26:17 2018 +0100
401885a
Use _AC and UL macros from linux/const.h
by Baruch Siach
· Sun Nov 11 12:31:01 2018 +0200
748dae2
riscv: Remove CSR read/write defines in encoding.h
by Bin Meng
· Wed Sep 26 06:55:15 2018 -0700
055700e
riscv: Add a helper routine to print CPU information
by Bin Meng
· Wed Sep 26 06:55:14 2018 -0700
ebd336f
riscv: Remove mach type
by Bin Meng
· Wed Sep 26 06:55:09 2018 -0700
d9eec24
riscv: Remove setup.h
by Bin Meng
· Wed Sep 26 06:55:07 2018 -0700
1359226
arch: types.h: factor out fixed width typedefs to int-ll64.h
by Masahiro Yamada
· Mon Aug 06 20:47:39 2018 +0900
b66af37
riscv: cpu: nx25: Rename as ax25
by Rick Chen
· Tue May 29 09:54:40 2018 +0800
9dbb973
SPDX: Convert single license tags to Linux Kernel style
by Rick Chen
· Tue May 29 14:10:06 2018 +0800
7ea64b0
riscv: Add board_quiesce_devices stub
by Alexander Graf
· Mon Apr 23 07:59:46 2018 +0200
3bb8f01
riscv: Add setjmp/longjmp code
by Alexander Graf
· Mon Apr 23 07:59:43 2018 +0200
435e382
riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
by Bryan O'Donoghue
· Mon Apr 30 15:56:04 2018 +0100
1c12981
riscv: Define PLATFORM__SET_BIT for generic_set_bit()
by Bryan O'Donoghue
· Mon Apr 30 15:56:03 2018 +0100
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
53b47b8
riscv: bootm: Remove ATAGS
by Rick Chen
· Tue Mar 13 14:59:41 2018 +0800
69ae630
riscv: checkpatch: Fix alignment should match open parenthesis
by Rick Chen
· Mon Feb 12 11:17:47 2018 +0800
b34b4b9
riscv: checkpatch: Fix use of volatile
by Rick Chen
· Mon Feb 12 11:10:04 2018 +0800
5febadd
riscv: checkpatch: Fix Macro argument reuse
by Rick Chen
· Mon Feb 12 11:07:58 2018 +0800
76c0a24
riscv: nx25: include: Add header files to support RISC-V
by Rick Chen
· Tue Dec 26 13:55:51 2017 +0800