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git01.mediatek.com / filogic / uboot / 8f440bd40ef2000214cfa8f3eaee7f7fda16d069 / include / common_timing_params.h
  1. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  2. d3e6816 Revert "drivers/ddr/fsl: Dual-license DDR driver" by Tom Rini · 7 years ago
  3. 6d49eda drivers/ddr/fsl: Dual-license DDR driver by York Sun · 7 years ago
  4. 6db4fdd drivers/ddr/fsl: Add 3DS RDIMM support by York Sun · 7 years ago
  5. e237880 Add more SPDX-License-Identifier tags by Tom Rini · 9 years ago
  6. 2896cb7 driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · 11 years ago
  7. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago[Renamed from arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h]
  8. 0b81093 mpc8xxx: set x2 DDR3 refresh rate if SPD config requires it by Valentin Longchamp · 11 years ago
  9. 4a71741 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · 11 years ago
  10. de87932 powerpc/8xxx: Enable DDR3 RDIMM support by york · 14 years ago
  11. 88fbf93 Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc8xxx/ddr/common_timing_params.h]
  12. 29514c7 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc8xxx/ddr/common_timing_params.h]
  13. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago