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git01.mediatek.com / filogic / uboot / 8f1c98e166937d07496ca613bc05e8124fc5afb1 / board / freescale / mpc8641hpcn / ddr.c
  1. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  2. e237880 Add more SPDX-License-Identifier tags by Tom Rini · Thu Jan 14 22:05:13 2016 -0500
  3. f062659 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · Mon Sep 30 09:22:09 2013 -0700
  4. 4a71741 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · Wed Sep 25 10:41:19 2013 +0530
  5. b6d2ef6 powerpc/mpc8xxx: Merge entries in DDR speed table by York Sun · Mon Oct 03 09:19:53 2011 -0700
  6. 24b66e5 powerpc/mpc85xx: Display a warning for unsupported DDR data rates by York Sun · Mon Jun 27 13:30:55 2011 -0700
  7. c68e86c powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board by Kumar Gala · Mon Jan 31 22:18:47 2011 -0600
  8. b78c7bf powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq() by Kumar Gala · Mon Jan 31 20:36:02 2011 -0600
  9. a06d74c fsl-ddr: use the 1T timing as default configuration by Dave Liu · Fri Nov 21 16:31:43 2008 +0800
  10. 82f15f3 Coding Style cleanup, update CHANGELOG by Wolfgang Denk · Sun Nov 02 16:14:22 2008 +0100
  11. 4e0dd7f Add DDR options setting on MPC8641HPCN board by Haiying Wang · Fri Oct 03 12:37:57 2008 -0400
  12. fa44036 Pass dimm parameters to populate populate controller options by Haiying Wang · Fri Oct 03 12:36:55 2008 -0400
  13. cad506c FSL DDR: Convert MPC8641HPCN to new DDR code. by Kumar Gala · Tue Aug 26 15:01:35 2008 -0500