Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
8ed6661b0238f91cb6b055a3d5a7e0f1fdf685e2
/
arch
/
x86
/
cpu
9bbb37f
x86: Enable debug UART for Minnowmax
by Simon Glass
· Sun Aug 02 18:07:21 2015 -0600
752f976
x86: qemu: Support operation as an EFI payload
by Simon Glass
· Tue Aug 04 12:34:03 2015 -0600
a815df7
x86: baytrail: Support operation as an EFI payload
by Simon Glass
· Tue Aug 04 12:34:02 2015 -0600
2b6d80b
x86: Handle running as EFI payload
by Simon Glass
· Tue Aug 04 12:34:00 2015 -0600
f95ad8c
x86: Add support for passing tables into U-Boot
by Simon Glass
· Tue Aug 04 12:33:57 2015 -0600
bae81c7
x86: Add a way to call 32-bit code from 64-bit mode
by Simon Glass
· Tue Aug 04 12:33:55 2015 -0600
672e82c
x86: Add relocation and link script for a 64-bit EFI application
by Simon Glass
· Tue Aug 04 12:33:51 2015 -0600
ab76a47
x86: Add support for U-Boot as an EFI application
by Ben Stoltz
· Tue Aug 04 12:33:46 2015 -0600
c4b9ef8
x86: Tidy up a few minor issues with interrupts
by Simon Glass
· Fri Jul 31 09:31:32 2015 -0600
daa93d9
x86: Add some missing global_data declarations in files that use gd
by Simon Glass
· Fri Jul 31 09:31:31 2015 -0600
f2d1a11
x86: Tidy up the 64-bit calling code
by Simon Glass
· Fri Jul 31 09:31:30 2015 -0600
5d18dc9
x86: Tidy up global_data flags
by Simon Glass
· Fri Jul 31 09:31:28 2015 -0600
cecf90e
x86: Use CR0 constants in CPU init
by Simon Glass
· Fri Jul 31 09:31:26 2015 -0600
611f749
x86: Add various minor tidy-ups to the 32-bit startup code
by Simon Glass
· Fri Jul 31 09:31:25 2015 -0600
947391c
x86: bayleybay: Configure PCI IRQ
by Bin Meng
· Thu Jul 30 03:49:18 2015 -0700
33e140d
x86: qemu: Turn on PCIe ECAM address range decoding on Q35
by Bin Meng
· Wed Jul 22 01:21:14 2015 -0700
354dcdd
x86: qemu: Enable writing MP table
by Bin Meng
· Wed Jul 22 01:21:13 2015 -0700
8972776
x86: Allow cpu-x86 driver to be probed for UP
by Bin Meng
· Wed Jul 22 01:21:12 2015 -0700
8f71dc8
x86: qemu: Enable I/O APIC chip select on PIIX3
by Bin Meng
· Wed Jul 22 01:21:11 2015 -0700
d0e9373
x86: Convert to use driver model pci on queensbay/crownbay
by Bin Meng
· Sun Jul 19 00:20:07 2015 +0800
e0a5fd9
x86: pci: Do not assign irq 0 to pci device
by Bin Meng
· Wed Jul 15 16:23:41 2015 +0800
da5d463
x86: pci: Assign pci irqs to all functions
by Bin Meng
· Wed Jul 15 16:23:40 2015 +0800
770fd33
x86: Enable DM RTC support for all x86 boards
by Bin Meng
· Wed Jul 15 16:23:39 2015 +0800
268ca83
x86: Change pci option rom area MTRR setting to cacheable
by Bin Meng
· Wed Jul 15 16:23:38 2015 +0800
fdebed8
x86: Simplify architecture defined exception handling in irq_llsr()
by Bin Meng
· Fri Jul 10 10:51:23 2015 +0800
9ff054b
x86: Display correct CS/EIP/EFLAGS when there is an error code
by Bin Meng
· Fri Jul 10 10:38:32 2015 +0800
53112f2
Kill unneeded #include <linux/kconfig.h>
by Masahiro Yamada
· Fri Jul 17 20:30:28 2015 +0900
5888bd2
dm: x86: baytrail: Correct PCI region 3 when driver model is used
by Simon Glass
· Fri Jul 03 18:28:27 2015 -0600
0e87edc
dm: x86: minnowmax: Move PCI to use driver model
by Simon Glass
· Fri Jul 03 18:28:26 2015 -0600
a1548b8
x86: pci: Tidy up the generic x86 PCI driver
by Simon Glass
· Fri Jul 03 18:28:25 2015 -0600
fcf3bdd
x86: queensbay: Change CPU_ADDR_BITS to 32
by Bin Meng
· Mon Jul 06 16:31:31 2015 +0800
c45a93b
x86: Setup fixed range MTRRs for legacy regions
by Bin Meng
· Mon Jul 06 16:31:30 2015 +0800
d2f66a3
x86: queensbay: Change PCIe root ports' interrupt routing
by Bin Meng
· Tue Jun 23 12:18:55 2015 +0800
e5d0500
x86: Remove inline for lapic access routines
by Bin Meng
· Tue Jun 23 12:18:50 2015 +0800
8fefeec
x86: Add I/O APIC register access routines
by Bin Meng
· Tue Jun 23 12:18:49 2015 +0800
16758a3
x86: Reduce PIRQ routing table size
by Bin Meng
· Tue Jun 23 12:18:47 2015 +0800
3a531a3
x86: Ignore function number when writing PIRQ routing table
by Bin Meng
· Tue Jun 23 12:18:46 2015 +0800
5ed2c5c
x86: Write correct bus number for the irq router
by Bin Meng
· Tue Jun 23 12:18:45 2015 +0800
c9dea01
x86: Clean up lapic codes
by Bin Meng
· Wed Jun 17 11:15:38 2015 +0800
6b602b2
x86: Move lapic_setup() call into init_bsp()
by Bin Meng
· Wed Jun 17 11:15:37 2015 +0800
f967f9a
x86: Move MP initialization codes into a common place
by Bin Meng
· Wed Jun 17 11:15:36 2015 +0800
eb0bc56
x86: ivybridge: Remove SMP from CPU_SPECIFIC_OPTIONS
by Bin Meng
· Wed Jun 17 11:15:35 2015 +0800
12d4105
x86: dm: Clean up cpu drivers
by Bin Meng
· Fri Jun 12 14:52:20 2015 +0800
d560c5c
x86: fsp: Move FspInitEntry call to board_init_f()
by Bin Meng
· Sun Jun 07 11:33:14 2015 +0800
a3c9fb0
x86: fsp: Load GDT before calling FspInitEntry
by Bin Meng
· Sun Jun 07 11:33:13 2015 +0800
51b0f62
x86: Add Kconfig options to be used by arch/x86/cpu/config.mk
by Bin Meng
· Sun Jun 07 11:33:12 2015 +0800
4f5908d
x86: baytrail: pci region 3 is not always mapped to end of ram
by Andrew Bradford
· Wed Jun 03 12:37:39 2015 -0400
ef37e7b
x86: qemu: Implement PIRQ routing
by Bin Meng
· Wed Jun 03 09:20:06 2015 +0800
70be096
x86: coreboot: Control I/O port 0xb2 writing via device tree
by Bin Meng
· Wed Jun 03 09:20:05 2015 +0800
5949013
x86: coreboot: Fix cosmetic issues
by Bin Meng
· Wed Jun 03 09:20:02 2015 +0800
8e97e29
x86: qemu: Adjust VGA initialization
by Bin Meng
· Mon May 25 22:36:27 2015 +0800
19c7739
x86: qemu: Enable legacy IDE I/O ports decode
by Bin Meng
· Mon May 25 22:36:26 2015 +0800
a8b70a1
x86: qemu: Turn on legacy segments decode
by Bin Meng
· Sun May 24 00:12:33 2015 +0800
4a6da30
x86: Do sanity test on pirq table before writing
by Bin Meng
· Mon May 25 22:35:07 2015 +0800
ef9e9f9
x86: quark: Implement PIRQ routing
by Bin Meng
· Mon May 25 22:35:06 2015 +0800
51c3b1e
x86: Refactor PIRQ routing support
by Bin Meng
· Mon May 25 22:35:04 2015 +0800
ceb9793
x86: qemu: Add graphics support
by Bin Meng
· Mon May 11 07:36:30 2015 +0800
2229c4c
x86: Support QEMU x86 targets
by Bin Meng
· Thu May 07 21:34:08 2015 +0800
987214d
x86: Add a CPU driver for baytrail
by Simon Glass
· Wed Apr 29 22:26:02 2015 -0600
02fe5e6
x86: Allow CPUs to be set up after relocation
by Simon Glass
· Wed Apr 29 22:26:01 2015 -0600
a9a4426
x86: Add multi-processor init
by Simon Glass
· Wed Apr 29 22:25:59 2015 -0600
98d7e98
x86: Provide access to the IDT
by Simon Glass
· Tue Apr 28 20:25:16 2015 -0600
2027f2b
x86: Store the GDT pointer in global_data
by Simon Glass
· Tue Apr 28 20:25:15 2015 -0600
47e2021
x86: Disable -Werror
by Simon Glass
· Tue Apr 28 20:25:06 2015 -0600
cce93d1
x86: Remove unwanted MMC debugging
by Simon Glass
· Tue Apr 28 20:25:05 2015 -0600
d0963d4
x86: quark: Use reset_cpu()
by Simon Glass
· Tue Apr 28 20:11:31 2015 -0600
1375e9a
x86: ivybridge: Use reset_cpu()
by Simon Glass
· Tue Apr 28 20:11:30 2015 -0600
e0e7bd0
x86: Implement reset_cpu() correctly for modern CPUs
by Simon Glass
· Tue Apr 28 20:11:29 2015 -0600
9278471
x86: link: Add PCH driver to support SPI Flash
by Simon Glass
· Mon Apr 20 07:07:03 2015 -0600
6db1448
x86: quark: Turn on legacy segments decode
by Bin Meng
· Mon Apr 27 14:16:02 2015 +0800
1530536
x86: queensbay: Implement PIRQ routing
by Bin Meng
· Fri Apr 24 18:10:06 2015 +0800
f17cea6
x86: Write configuration tables in last_stage_init()
by Bin Meng
· Fri Apr 24 18:10:04 2015 +0800
363849b
x86: Add a function to assign IRQ numbers to PCI device
by Bin Meng
· Fri Apr 24 18:10:03 2015 +0800
80e336a
x86: queensbay: Avoid using PCH prefix
by Bin Meng
· Mon Apr 13 19:03:42 2015 +0800
5322d62
Kconfig: Move CONFIG_BOOTSTAGE to Kconfig
by Simon Glass
· Mon Mar 02 17:04:37 2015 -0700
06e694f
x86: chromebook_link: dts: Add PCH and LPC devices
by Simon Glass
· Thu Mar 26 09:29:29 2015 -0600
404bc5e
dm: x86: Add a uclass for a Platform Controller Hub
by Simon Glass
· Thu Mar 26 09:29:27 2015 -0600
35f15f6
dm: x86: spi: Convert ICH SPI driver to driver model
by Simon Glass
· Thu Mar 26 09:29:26 2015 -0600
e0e7b36
dm: x86: pci: Convert chromebook_link to use driver model for pci
by Simon Glass
· Thu Mar 05 12:25:33 2015 -0700
3da658a
dm: x86: pci: Convert coreboot to use driver model for pci
by Simon Glass
· Thu Mar 05 12:25:32 2015 -0700
4e03781
dm: x86: pci: Add a PCI driver for driver model
by Simon Glass
· Thu Mar 05 12:25:31 2015 -0700
7567f46
x86: Split up arch_cpu_init()
by Simon Glass
· Thu Mar 05 12:25:17 2015 -0700
240d06d
x86: Add a x86_ prefix to the x86-specific PCI functions
by Simon Glass
· Thu Mar 05 12:25:15 2015 -0700
745b1d1
x86: Support machines with >4GB of RAM
by Simon Glass
· Mon Mar 02 12:40:49 2015 -0700
7e96d31
x86: quark: Enable on-chip ethernet controllers
by Bin Meng
· Wed Mar 11 11:25:56 2015 +0800
0ddc04b
arch/x86/cpu/quark/mrc.c: Switch to U_BOOT_DATE / U_BOOT_TIME
by Tom Rini
· Thu Feb 19 06:58:57 2015 -0500
15e3f28
x86: quark: MRC codes clean up
by Bin Meng
· Tue Mar 10 18:31:20 2015 +0800
ffdb488
remove unnecessary version.h includes
by Rob Herring
· Tue Mar 17 15:28:55 2015 -0500
d79593b
x86: Add SD/MMC support to quark/galileo
by Bin Meng
· Wed Feb 04 16:26:13 2015 +0800
ba6faff
x86: Add SPI support to quark/galileo
by Bin Meng
· Wed Feb 04 16:26:12 2015 +0800
3446986
x86: quark: Initialize non-standard BARs
by Bin Meng
· Wed Feb 04 16:26:09 2015 +0800
cdffd3b
x86: quark: Call MRC in dram_init()
by Bin Meng
· Thu Feb 05 23:42:28 2015 +0800
72ce2af
x86: quark: Enable the Memory Reference Code build
by Bin Meng
· Thu Feb 05 23:42:25 2015 +0800
93b4a39
x86: quark: Add System Memory Controller support
by Bin Meng
· Thu Feb 05 23:42:24 2015 +0800
e159cdf
x86: quark: Add utility codes needed for MRC
by Bin Meng
· Thu Feb 05 23:42:23 2015 +0800
4915037
x86: quark: Add Memory Reference Code (MRC) main routines
by Bin Meng
· Thu Feb 05 23:42:22 2015 +0800
06118ba
x86: quark: Bypass TSC calibration
by Bin Meng
· Thu Feb 05 23:42:21 2015 +0800
8ba49fe
x86: Enable the Intel quark/galileo build
by Bin Meng
· Mon Feb 02 22:35:29 2015 +0800
81da5a8
x86: Add basic Intel Quark processor support
by Bin Meng
· Mon Feb 02 22:35:27 2015 +0800
1d3068c
x86: quark: Add Cache-As-RAM initialization
by Bin Meng
· Mon Feb 02 22:35:26 2015 +0800
Next »