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git01.mediatek.com / filogic / uboot / 8e738cef46bda204774004678a53beb14a79625b / arch / arm / include / asm / arch-zynq / sys_proto.h
  1. bf4b149 ARM: zynq: Move ps7_init() out of spl.h by Michal Simek · Mon Aug 11 14:01:57 2014 +0200
  2. 8d19162 ARM: zynq: Add MIO detection code by Michal Simek · Fri Apr 25 12:21:04 2014 +0200
  3. e26ef3b ARM: zynq: Added efuse status register base address by Siva Durga Prasad Paladugu · Fri Nov 29 19:01:25 2013 +0530
  4. c57ba04 mmc: zynq: Add OF initialization support by Michal Simek · Mon Feb 24 11:16:31 2014 +0100
  5. 4dded98 net: zynq_gem: Calculate clock dividers dynamically by Soren Brinkmann · Thu Nov 21 13:39:01 2013 -0800
  6. 3b5b992 net: zynq_gem: Move RCLK details out of driver by Soren Brinkmann · Thu Nov 21 13:39:00 2013 -0800
  7. 11704c2 zynq: Add support to find bootmode by Jagannadha Sutradharudu Teki · Thu Jan 09 01:48:21 2014 +0530
  8. f5ff7bc zynq: Add new ddrc driver for ECC support by Michal Simek · Mon Jun 17 14:37:01 2013 +0200
  9. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  10. 15d654c fpga: zynq: Add support for loading bitstream by Michal Simek · Mon Apr 22 15:43:02 2013 +0200
  11. 0dd222b mmc: Add support for Xilinx Zynq sdhci controller by Michal Simek · Mon Apr 22 14:56:49 2013 +0200
  12. d9f2c11 net: gem: Fix gem driver on 1Gbps LAN by Michal Simek · Mon Oct 15 14:01:23 2012 +0200
  13. eb1dfa7 arm: zynq: Add SLCR support with system reset by Michal Simek · Mon Feb 04 12:38:59 2013 +0100