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git01.mediatek.com / filogic / uboot / 8d5c4c3b38bf920ac60e73c2f26c24e812eb1b04 / drivers / clk / rockchip
  1. cb1c7af rockchip: clk: Support setting ACLK by Simon Glass · Sun Nov 13 14:22:13 2016 -0700
  2. 901c2ce rockchip: rk3288: Move rockchip_get_cru() out of the driver by Simon Glass · Sat Oct 01 20:04:52 2016 -0600
  3. d1dfea7 rockchip: rk3399: Move rockchip_get_cru() out of the driver by Simon Glass · Sat Oct 01 20:04:51 2016 -0600
  4. 3814f0e rockchip: rk3036: Move rockchip_get_cru() out of the driver by Simon Glass · Sat Oct 01 20:04:50 2016 -0600
  5. 78b6c3f clk: rk3399: fix rockchip_get_cru by Jacob Chen · Tue Sep 27 15:48:45 2016 +0800
  6. 4051462 clk: rk3288: add PWM clock get rate by Kever Yang · Fri Aug 12 17:57:05 2016 +0800
  7. e54d26a clk: rk3399: add pmucru controller support by Kever Yang · Fri Aug 12 17:47:15 2016 +0800
  8. 1b7dcc3 rockchip: remove log2 reimplementation from clock drivers by Heiko Stübner · Fri Jul 22 23:51:06 2016 +0200
  9. dc850de clock: rk3399: add support for dwmmc 400K by Kever Yang · Thu Aug 04 11:44:58 2016 +0800
  10. 4776f0b move: rockchip: move clock drivers into a subdirectory by Heiko Stübner · Fri Jul 29 14:47:21 2016 +0200