Log - 8cba8f0be0142bfd814c505cf5a26dd212eeea44 - filogic/uboot

8cba8f0 clk: mediatek: mt7981: support alternative compatible for fixed-plls by Christian Marangi · Mon Jun 24 23:03:35 2024 +0200
dec7ea0 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" by Tom Rini · Mon May 20 13:35:03 2024 -0600
abb9a04 Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" by Tom Rini · Sat May 18 20:20:43 2024 -0600
32fa621 clk: Remove <common.h> and add needed includes by Tom Rini · Wed May 01 19:30:36 2024 -0600
e9e0fee clk: mediatek: add clock driver support for MediaTek MT8365 SoC by Julien Masson · Mon Dec 04 11:48:52 2023 +0100
d27e302 clk: mediatek: add clock driver support for MediaTek MT7988 SoC by developer · Wed Jul 19 17:16:28 2023 +0800
79128da clk: mediatek: add clock driver support for MediaTek MT7981 SoC by developer · Fri Sep 09 20:00:12 2022 +0800
37161fe clk: mediatek: add clock driver support for MediaTek MT7986 SoC by developer · Fri Sep 09 20:00:09 2022 +0800
f724f11 clk: mediatek: add CLK_XTAL support for clock driver by developer · Fri Sep 09 20:00:07 2022 +0800
ad5b075 clk: mediatek: add infrasys clock mux support by developer · Fri Sep 09 20:00:04 2022 +0800
fd47f76 clk: mediatek: add support to configure clock driver parent by developer · Fri Sep 09 20:00:01 2022 +0800
2dc4caa clk: mediatek: add CLK_BYPASS_XTAL flag to allow bypassing searching clock parent of xtal clock by developer · Fri Sep 09 19:59:59 2022 +0800
4b1c515 clk: mediatek: Add MT8183 clock driver by Fabien Parent · Sat Oct 17 12:52:15 2020 +0200
65130cd dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET() by Simon Glass · Mon Dec 28 20:34:56 2020 -0700
8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
e51b57a clk: mt7622: add needed clocks for ssusb-node by Frank Wunderlich · Thu Aug 20 16:37:55 2020 +0200
cee08a1 reset: drop unnecessary comment for pciesys by Frank Wunderlich · Thu Aug 20 16:37:53 2020 +0200
8bdcb39 reset: add basic reset controller for pciesys by Frank Wunderlich · Thu Aug 13 10:20:46 2020 +0200
420e8bf clk: mediatek: add pciesys support for MT7622 SoC by developer · Mon Aug 10 16:17:08 2020 +0800
4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
dbd7954 common: Drop linux/delay.h from common header by Simon Glass · Sun May 10 11:40:11 2020 -0600
0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
94fc842 clk: mediatek: use unsigned type for returning the clk rate by Fabien Parent · Thu Oct 17 21:02:05 2019 +0200
65da8e7 clk: mediatek: fix clock-rate overflow problem by developer · Fri Jan 10 16:30:30 2020 +0800
dea5651 clk: mediatek: add driver for MT7622 by developer · Fri Jan 10 16:30:29 2020 +0800
ef45feb clk: mediatek: mt7629: add support for ssusbsys by developer · Thu Jan 09 11:35:04 2020 +0800
0b5e5f1 clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll by developer · Tue Dec 31 11:29:22 2019 +0800
ba560c7 clk: mediatek: add set_clr_upd mux type flow by developer · Tue Dec 31 11:29:21 2019 +0800
4a79703 clk: mediatek: add driver support for MT8512 by developer · Tue Dec 31 11:29:20 2019 +0800
5817d5c clk: mediatek: add driver for MT8518 by developer · Thu Nov 07 19:28:41 2019 +0800
a588d15 clk: MediaTek: add hifsys entry for MT7623 SoC. by developer · Mon Jul 29 22:17:48 2019 +0800
1fe5ad0 clk: mediatek: add driver for MT8516 by Fabien Parent · Sun Mar 24 16:46:36 2019 +0100
69463e5 clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags by Fabien Parent · Sun Mar 24 16:46:35 2019 +0100
0225945 clk: MediaTek: bind ethsys reset controller by developer · Thu Dec 20 16:12:52 2018 +0800
d1b1ffa clk: MediaTek: add clock driver for MT7623 SoC. by developer · Thu Nov 15 10:07:55 2018 +0800
2186c98 clk: MediaTek: add clock driver for MT7629 SoC. by developer · Thu Nov 15 10:07:54 2018 +0800