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git01.mediatek.com / filogic / uboot / 881c2713461de5a9e58e52ee823db4ac45c06ad7 / board / freescale / b4860qds / b4860qds.c
  1. f4fe44a fsl/mpc85xx: define common serdes_clock_to_string function by Valentin Longchamp · Fri Oct 18 11:47:23 2013 +0200
  2. d1cb774 board/b4860qds: Add support for configuring SerDes1 Refclks by Shaveta Leekha · Tue Jul 02 14:43:53 2013 +0530
  3. c87e81e powerpc/corenet: Move RCW print to cpu.c by York Sun · Tue Jun 25 11:37:43 2013 -0700
  4. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  5. 9320160 powerpc/b4860: fix for Serdes connectivity to SFP's by Shaveta Leekha · Mon Mar 25 07:40:17 2013 +0000
  6. a8b5739 ppc: Move lbc_clk and cpu to arch_global_data by Simon Glass · Thu Dec 13 20:48:48 2012 +0000
  7. 6942b48 powerpc/b4860qds: Add support to dump switch settings on b4860qds board by Shaveta Leekha · Sun Dec 23 19:25:42 2012 +0000
  8. 0789dc9 powerpc/b4860qds: Added Support for B4860QDS by York Sun · Sun Dec 23 19:25:27 2012 +0000