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git01.mediatek.com / filogic / uboot / 87fc32b145af00d32fbe4b4d91e6e5c530e780f9 / board / freescale / imx8ulp_evk / spl.c
  1. bb11234 treewide: rework linker symbol declarations in sections header by Shiji Yang · Thu Aug 03 09:47:16 2023 +0800
  2. aa70b85 imx: imx8ulp: start the ELE RNG at boot by Peng Fan · Thu Jun 15 18:09:14 2023 +0800
  3. d5c3183 imx: use generic name ele(EdgeLockSecure Enclave) by Peng Fan · Thu Jun 15 18:09:05 2023 +0800
  4. 7edb362 imx: imx8ulp: Configure XRDC PDAC and MSC for DBD owner=S400 only by Ye Li · Tue Jan 31 16:42:24 2023 +0800
  5. d5ffe55 imx: imx8ulp: Get chip revision from Sentinel by Ye Li · Tue Jan 31 16:42:13 2023 +0800
  6. c408ed3 misc: imx: S400_API: Move S400 MU and API to a common place by Ye Li · Tue Jul 26 16:40:49 2022 +0800
  7. 580cc7b i.MX8ULP: add display_ele_fw_version api by Gaurav Jain · Wed May 11 14:07:55 2022 +0530
  8. 40bcdf9 imx: imx8ulp: release CAAM for the Cortex-A35 by Clement Faure · Wed Apr 06 14:30:21 2022 +0800
  9. fb82b77 imx: imx8ulp: Load the lposc fuse for dual boot by Ye Li · Wed Apr 06 14:30:18 2022 +0800
  10. 8c0c8d0 imx: imx8ulp_evk: Skip init DDR for reboot in dual boot mode by Ye Li · Wed Apr 06 14:30:13 2022 +0800
  11. 4cdb3a3 imx: imx8ulp: add ND/LD clock by Peng Fan · Wed Apr 06 14:30:12 2022 +0800
  12. 9f37143 imx: imx8ulp_evk: Remove PMIC Bucks PWM mode settings by Ye Li · Wed Apr 06 14:30:11 2022 +0800
  13. 133f8b8 imx8ulp: Workaround LPOSC_TRIM fuse load issue by Ye Li · Fri Oct 29 09:46:25 2021 +0800
  14. 715cfa0 imx8ulp: Fix DCNANO QoS setting by Ye Li · Fri Oct 29 09:46:23 2021 +0800
  15. cbe5d38 arm: imx: add i.MX8ULP EVK support by Peng Fan · Sat Aug 07 16:01:13 2021 +0800