1. 8709aed 85xx: Set HID1[mbdd] on e500v2 rev5.0 or greater by Sandeep Gopalpet · Fri Mar 12 10:45:02 2010 +0530
  2. 5530cb8 85xx: Add defines for BUCSR bits to make code more readable by Kumar Gala · Mon Mar 29 13:50:31 2010 -0500
  3. 48bd5f0 85xx: Fix enabling of L1 cache parity on secondary cores by Kumar Gala · Fri Mar 26 15:14:43 2010 -0500
  4. 4756ffa ppc/85xx: Map boot page guarded for MP boot by Kumar Gala · Tue Nov 17 20:21:20 2009 -0600
  5. 8d2817c 85xx: Add support for e500mc cache stashing by Kumar Gala · Thu Mar 19 02:53:01 2009 -0500
  6. b8bb411 ppc/85xx: Fix misc L2 cache enabling bug by Dave Liu · Sat Oct 31 07:59:55 2009 +0800
  7. 7feaacb 85xx: MP Boot Page Translation update by Peter Tyser · Fri Oct 23 15:55:47 2009 -0500
  8. b6a4090 ppc/85xx: Fix enabling of L2 cache by Kumar Gala · Tue Sep 22 15:45:44 2009 -0500
  9. c24a905 85xx: Add support for setting IVORs to fixed offset defaults by Kumar Gala · Fri Aug 14 13:37:54 2009 -0500
  10. 4baef82 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx by Poonam Aggrwal · Fri Jul 31 12:08:14 2009 +0530
  11. e56f2c5 85xx: Add support for additional e500mc features by Kumar Gala · Thu Mar 19 09:16:10 2009 -0500
  12. f474551 Set IVPR to kenrel entry point in second core boot page by Haiying Wang · Wed Dec 03 10:08:19 2008 -0500
  13. 9f4a689 85xx: Add basic e500mc core support by Kumar Gala · Thu Oct 23 01:47:38 2008 -0500
  14. b937cc5 85xx: Ensure timebase is zero on secondary cores by Kumar Gala · Mon Sep 08 08:51:29 2008 -0500
  15. ccdeac7 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUS by Kumar Gala · Mon Aug 11 11:29:28 2008 -0500
  16. 398dcd6 85xx: Additional fixes and cleanup of MP code by Kumar Gala · Mon Apr 28 02:24:04 2008 -0500
  17. deeac57 85xx: Update multicore boot mechanism to ePAPR v0.81 spec by Kumar Gala · Wed Mar 26 08:34:25 2008 -0500
  18. 36d6b3f 85xx: Added support for multicore boot mechanism by Kumar Gala · Thu Jan 17 16:48:33 2008 -0600