Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
843fabde2fbfd4429e5447c551cae9f0c8b18419
/
drivers
/
ddr
/
fsl
/
ddr3_dimm_params.c
2c0b62d
driver/ddr/fsl: Add support for multiple DDR clocks
by York Sun
· Tue Jan 06 13:18:50 2015 -0800
f062659
Driver/DDR: Moving Freescale DDR driver to a common driver
by York Sun
· Mon Sep 30 09:22:09 2013 -0700
[Renamed (98%) from arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c]
0b81093
mpc8xxx: set x2 DDR3 refresh rate if SPD config requires it
by Valentin Longchamp
· Fri Oct 18 11:47:20 2013 +0200
4a71741
powerpc: Fix CamelCase warnings in DDR related code
by Priyanka Jain
· Wed Sep 25 10:41:19 2013 +0530
4889c98
powerpc/mpc8xxx: Add x4 DDR device support
by York Sun
· Tue Jun 25 11:37:47 2013 -0700
794c692
powerpc/mpc8xxx: Add fine timing support for DDR3
by York Sun
· Fri Aug 17 08:22:37 2012 +0000
09da8b8
mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification
by Ira W. Snyder
· Mon Nov 21 13:20:33 2011 -0800
3c48d6c
GCC4.6: Squash warnings in ddr[123]_dimm_params.c
by Marek Vasut
· Fri Oct 21 14:17:19 2011 +0000
b9d6b0c
powerpc/mpc8xxx: check SPD length before using part number
by York Sun
· Fri May 27 07:25:50 2011 +0800
046d772
mpc8xxx: DDR2/DDR3: Clean up DIMM-type switch statements
by Kyle Moffett
· Mon Mar 28 11:35:48 2011 -0400
de87932
powerpc/8xxx: Enable DDR3 RDIMM support
by york
· Fri Jul 02 22:25:55 2010 +0000
88fbf93
Move arch/ppc to arch/powerpc
by Stefan Roese
· Thu Apr 15 16:07:28 2010 +0200
[Renamed from arch/ppc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c]
29514c7
ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU
by Peter Tyser
· Mon Apr 12 22:28:09 2010 -0500
[Renamed from cpu/mpc8xxx/ddr/ddr3_dimm_params.c]
14f2eb1
ppc/8xxx: Misc DDR related fixes
by Kumar Gala
· Thu Sep 10 14:54:55 2009 -0500
efb8ce3
fsl_ddr: Fix DDR3 calculation of rank density with 8GB or more
by Timur Tabi
· Wed Jul 01 16:51:59 2009 -0500
68ef4bd
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
by Kumar Gala
· Thu Jun 11 23:42:35 2009 -0500
4be87b2
fsl-ddr: add the DDR3 SPD infrastructure
by Dave Liu
· Sat Mar 14 12:48:30 2009 +0800